9.2.2 Detailed Design Procedure
When creating a new system design with an Ethernet PHY, follow this schematic capture procedure:
- Select desired PHY hardware configurations in Table 19.
- Use the Electrical Characteristics table and Table 18 to select the correct external bootstrap resistors.
- If using LEDs, ensure the correct external circuit is applied as shown in Figure 29.
- Select an appropriate clock source that adheres to either the CMOS-level oscillator or crystal resonator requirements within the Electrical Characteristics table.
- Select a CMC, a list of recommended CMCs are located in Table 133.
- Add common-mode termination, DC-blocking capacitors, an MDI-coupling capacitor, and an ESD shunt found in Table 132.
- Ensure that there is sufficient supply decoupling on VDDIO and VDDA supply pins.
- Add an external pullup resistor (tie to VDDIO) on MDIO line.
- If operating with SGMII, place 0.1-μF, DC-blocking capacitors between the MAC and PHY SGMII pins.
- If sleep modes are not desired, WAKE and EN pins should be tied to VDDIO directly or through an external pullup resistor.
The following layout procedure should be followed:
- Locate the PHY near the edge of the board so that short MDI traces can be routed to the desired connector.
- Place the MDI external components: CMC, DC-blocking capacitors, CM termination, MDI-coupling capacitor, and ESD shunt.
- Create a top-layer metal pour keepout under the CMC.
- Ensure that the MDI TRD_M and TRD_P traces are routed such that they are 100-Ω differential.
- Place the clock source near the XI and XO pins.
- Ensure that when configured for MII, RMII, or RGMII operation, the xMII pins are routed 50-Ω and are single-ended with reference to ground.
- Ensure that transmit path xMII pins are routed such that setup and hold timing does not violate the PHY requirements.
- Ensure that receive path xMII pins are routed such that setup and hold timing does not violate the MAC requirements.
- Ensure that when configured for SGMII operation, the xMII RX_P, RX_M, TX_P, and TX_M pins are routed 100-Ω differential.
- Place the MDIO pullup close to the PHY.