The supported features by the device ECAP are:
- 32-bit time base counter
- 4-event time-stamp registers (each 32 bits)
- Independent edge polarity selection for up to four sequenced time-stamp capture events
- Interrupt capabilities on any of the four capture events
- Input capture signal pre-scaling (from 1 to 16)
- Support of different capture modes (single shot capture, continuous mode capture, absolute timestamp capture or difference mode time-stamp capture)
Table 7-51 represents ECAP timing conditions.
Table 7-51 ECAP Timing Conditions
Section 220.127.116.11.1 and Section 18.104.22.168.2 present timing and switching characteristics for eCAP (see Figure 7-55 and Figure 7-56).