SLRS065E September   2013  – November 2015 DRV8860

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Recommended Output Current
      2. 8.3.2 Daisy Chain Connection
      3. 8.3.3 Protection Circuits
        1. 8.3.3.1 Overcurrent Protection (OCP)
        2. 8.3.3.2 Open Load Detection (OL) - DRV8860 only
        3. 8.3.3.3 Thermal Shutdown (TSD)
        4. 8.3.3.4 Undervoltage Lockout (UVLO)
        5. 8.3.3.5 Digital Noise Filter
    4. 8.4 Device Functional Modes
      1. 8.4.1 Internal Registers
    5. 8.5 Programming
      1. 8.5.1 Serial Control Interface
        1. 8.5.1.1 Data Writing Waveform
        2. 8.5.1.2 Fault Register Reading Waveform
        3. 8.5.1.3 Special Command
          1. 8.5.1.3.1 Special command: Write Control Register
          2. 8.5.1.3.2 Special command: Read Control Register
          3. 8.5.1.3.3 Special command: Read Data Register
          4. 8.5.1.3.4 Special command: Fault Register Reset
          5. 8.5.1.3.5 Special command: PWM Start
        4. 8.5.1.4 Output Energizing and PWM Control
          1. 8.5.1.4.1 PWM Start Special Command Used
    6. 8.6 Register Maps
      1. 8.6.1 Data Register
      2. 8.6.2 Fault Register
      3. 8.6.3 Control Register
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Drive Current
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply and Logic Sequencing
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Consideration
      1. 11.3.1 Power Dissipation
      2. 11.3.2 Heatsinking
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

PW (TSSOP) PACKAGE
(TOP VIEW)
DRV8860 DRV8860A PW_TSSOP_package_SLRS065.gif
PWP (HTSSOP) PACKAGE
(TOP VIEW)
DRV8860 DRV8860A PW_HTSSOP_package_SLRS065.gif

Pin Functions

NAME PIN I/O (1) DESCRIPTION EXTERNAL COMPONENTS OR CONNECTIONS
GND 5 — Device ground All pins must be connected to ground
VM 1 — Motor power supply Connect to motor supply voltage. Bypass to GND with a 0.1 μF ceramic capacitor plus a 10 μF electrolytic capacitor.
ENABLE 8 I Output stage enable control input Logic high to enable outputs, logic low to disable outputs. Internal logic and registers can be read and written to when ENABLE is logic low. Internal pulldown.
LATCH 4 I Serial latch signal Refer to serial communication waveforms. Internal pulldown.
CLK 3 I Serial clock input Rising edge clocks data into part for write operations. Falling edge clocks data out of part for read operations. Internal pulldown.
DIN 2 I Serial data input Serial data input from controller. Internal pulldown.
DOUT 6 O Serial data output Serial data output to controller. Open-drain output with internal pullup.
nFAULT 7 OD Fault Logic low when in fault condition. Open-drain output requires external pullup.
Faults: OCP, OTS, UVLO, OL (DRV8860 only)
OUT1 16 O Low-side output 1 NFET output driver. Connect external load between this pin and VM
OUT2 15 O Low-side output 2 NFET output driver. Connect external load between this pin and VM
OUT3 14 O Low-side output 3 NFET output driver. Connect external load between this pin and VM
OUT4 13 O Low-side output 4 NFET output driver. Connect external load between this pin and VM
OUT5 12 O Low-side output 5 NFET output driver. Connect external load between this pin and VM
OUT6 11 O Low-side output 6 NFET output driver. Connect external load between this pin and VM
OUT7 10 O Low-side output 7 NFET output driver. Connect external load between this pin and VM
OUT8 9 O Low-side output 8 NFET output driver. Connect external load between this pin and VM
(1) Directions: I = input, O = output, OD = open-drain output

Table 1. External Components

COMPONENT PIN 1 PIN 2 RECOMMENDED
C(VM1) VM GND 0.1 µF ceramic capacitor rated for VM
10 µF electrolytic capacitor rated for VM
R(nFAULT) V3P3 (1) nFAULT > 4.7 kΩ
(1) V3P3 is not a pin on the DRV8860, but a V3P3 supply voltage pullup is required for open-drain output nFAULT.