SLVSD18C June 2015 – August 2017 DRV8880
PRODUCTION DATA.
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If at any time the voltage on the VM pin falls below the logic undervoltage threshold voltage (VUVLO1), the internal logic is reset, and the V3P3 regulator is disabled. Operation will resume when VM rises above the UVLO1 threshold. The nFAULT pin is logic low during this state since it is pulled low upon encountering VM undervoltage. Decreasing VM below this undervoltage threshold will reset the indexer position.