JAJSCN1E December   1999  – December 2017 INA138 , INA168

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Range
      2. 7.3.2 Bandwidth
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Operation
    2. 8.2 Typical Applications
      1. 8.2.1 Buffering Output to Drive an ADC
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Selecting the Shunt Resistor and RL
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Output Filter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Offsetting the Output Voltage
      4. 8.2.4 Bipolar Current Measurement
      5. 8.2.5 Bipolar Current Measurement Using Differential Input of ADC
      6. 8.2.6 Multiplexed Measurement Using Logic Signal for Power
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 関連リンク
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.1.2.1 Selecting the Shunt Resistor and RL

In Figure 9 the value chosen for the shunt resistor depends on the application and is a compromise between small-signal accuracy and maximum permissible voltage loss in the measurement line. High values of shunt resistor provide better accuracy at lower currents by minimizing the effects of offset, while low values of shunt resistor minimize voltage loss in the supply line. For most applications, best performance is attained with a shunt resistor value that provides a full-scale shunt voltage range of 50 mV to 100 mV. Maximum input voltage for accurate measurements is 500 mV.

The load resistor, RL, is chosen to provide the desired full-scale output voltage. The output impedance of the INA1x8 OUT terminal is very high which permits using values of RL up to 500 kΩ with excellent accuracy. The input impedance of any additional circuitry at the output should be much higher than the value of RL to avoid degrading accuracy.

Some analog-to-digital converters (ADCs) have input impedances that significantly affect measurement gain. The input impedance of the ADC can be included as part of the effective RL if its input can be modeled as a resistor to ground. Alternatively, an op amp can be used to buffer the ADC input. The INA1x8 are current output devices, and as such have an inherently large output impedance. The output currents from the amplifier are converted to an output voltage via the load resistor, RL, connected from the amplifier output to ground. The ratio of the load resistor value to that of the internal resistor value determines the voltage gain of the system.

In many applications digitizing the output of the INA1x8 device is required, and can be accomplished by connecting the output of the amplifier to an ADC. It is very common for an ADC to have a dynamic input impedance. If the INA1x8 output is connected directly to an ADC input, the input impedance of the ADC is effectively connected in parallel with the gain setting resistor RL. This parallel impedance combination will affect the gain of the system and the impact on the gain is difficult to estimate accurately. A simple solution that eliminates the paralleling of impedances, simplifying the gain of the circuit is to place a buffer amplifier, such as the OPA340, between the output of the INA138 or INA168 device and the input to the ADC.

Figure 10 illustrates this concept. Notice that a low pass filter is placed between the OPA340 output and the input to the ADC. The filter capacitor is required to provide any instantaneous demand for current required by the input stage of the ADC. The filter resistor is required to isolate the OPA340 output from the filter capacitor to maintain circuit stability. The values for the filter components will vary according to the operational amplifier used for the buffer and the particular ADC selected. More information can be found regarding the design of the low pass filter in the TI Precision Design , 16 bit 1MSPS Data Acquisition Reference Design for Single-Ended Multiplexed Applications (TIPD173).

Figure 11 shows the expected results when driving an analog-to-digital converter at 1MSPS with and without buffering the INA1x8 output. Without the buffer, the high impedance of the INA1x8 reacts with the input capacitance and sample and hold (S/H) capacitance of the ADC, and does not allow the S/H to reach the correct final value before it is reset and the next conversion starts. Adding the buffer amplifier significantly reduces the output impedance driving the S/H and allows for higher conversion rates than can be achieved without adding the buffer.