The ISO15 and ISO15M are isolated half-duplex differential line drivers and receivers while the ISO35 and ISO35M are isolated full-duplex differential line transceivers for TIA/EIA 485/422 applications. They are rated to provide galvanic isolation of up to 2500 Vrms for 60 sec as per the standard. They have active-high driver enables and active-low receiver enables to control the data flow.
When the driver enable pin, DE, is logic high, the differential outputs Y and Z follow the logic states at data input D. A logic high at D causes Y to turn high and Z to turn low. In this case the differential output voltage defined as VOD = V(Y) – V(Z) is positive. When D is low, the output states reverse, Z turns high, Y becomes low, and VOD is negative. When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pulldown resistor to ground, thus when left open the driver is disabled (high-impedance) by default. The D pin has an internal pullup resistor to VCC, thus, when left open while the driver is enabled, output Y turns high and Z turns low.
When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = V(A) – V(B) is positive and higher than the positive input threshold, VIT+, the receiver output, R, turns high. When VID is negative and less than the negative and lower than the negative input threshold, VIT– , the receiver output, R, turns low. If VID is between VIT+ and VIT– the output is indeterminate. When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idle bus).
|L(I01)||Minimum air gap (Clearance)(1)||Shortest terminal to terminal distance through air||8.34||mm|
|L(I02)||Minimum external tracking (Creepage)(1)||Shortest terminal to terminal distance across the package surface||8.1||mm|
|CTI||Tracking resistance (Comparative Tracking Index)||DIN IEC 60112 / VDE 0303 Part 1||≥400||V|
|DTI||Minimum Internal Gap (Internal Clearance)||Distance through the insulation||0.008||mm|
|RIO||Isolation resistance||Input to output, VIO = 500 V, TA = 25°C, all pins on each side of the barrier tied together creating a two-terminal device||>1012||Ω|
|CIO||Barrier capacitance input to output||VI = 0.4 sin (4E6πt)||2||pF|
|CI||Input capacitance to ground||VI = 0.4 sin (4E6πt)||2||pF|
over recommended operating conditions (unless otherwise noted)(1)
|VIOTM||Transient overvoltage||Method a, t = 60 s, Qualification test||4000||VPK|
|VIORM||Maximum working insulation voltage||560||VPK|
|VPR||Input to output test voltage||Method b1, VPR = VIORM × 1.875,
100% Production test with t = 1 s, Partial discharge < 5 pC
|RS||Insulation resistance||VIO = 500 V at TS||>109||Ω|
|Basic isolation group||Material group||II|
|Installation classification||Rated mains voltage ≤ 150 VRMS||I-IV|
|Rated mains voltage ≤ 300 VRMS||I-III|
|Rated mains voltage ≤ 400 VRMS||I-II|
|Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-12||Approved under CSA Component Acceptance Notice 5A and IEC 60950-1||Recognized under UL 1577 Component Recognition Program(1)|
4000 VPK Maximum transient overvoltage,
560 VPK Maximum working voltage
|2500 VRMS Isolation rating,
396 VPK Basic working voltage per CSA 60950-1-07 and IEC 60950-1 (2nd Ed)
|Single Protection, 2500 VRMS|
|Certificate number: 40016131||Master contract number: 220991||File number: E181974|
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the I/O can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures.
|IS||Safety input, output, or supply current||DW-16||θJA = 168 °C/W, VI = 3.6 V, TJ = 170°C, TA = 25°C||240||mA|
|TS||Maximum case temperature||DW-16||150||°C|
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in Thermal Information is that of a device installed in a Low-Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages and is conservative. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.
|Y / A||Z / B|
VID = (VA – VB)
|PU||PU||–0.01 V ≤ VID||L||H|
|PU||PU||–0.2 V < VID < –0.01 V||L||?|
|PU||PU||VID ≤ –0.2 V||L||L|
|PU||PU||Idle (terminated) bus||L||H|