JAJS331P July   2006  – August 2018 ISO7220A , ISO7220B , ISO7220C , ISO7220M , ISO7221A , ISO7221B , ISO7221C , ISO7221M

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     概略回路図
  4. 4 改訂履歴
  5. 5 说明（续）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics—5-V VCC1 and V CC2 Supplies
    10. 7.10 Electrical Characteristics—5-V VCC1 and 3.3-V VCC2 Supply
    11. 7.11 Electrical Characteristics—3.3-V VCC1 and 5-V VCC2 Supply
    12. 7.12 Electrical Characteristics—3.3-V VCC1 and VCC2 Supplies
    13. 7.13 Electrical Characteristics—2.8-V VCC1 and VCC2 Supplies
    14. 7.14 Switching Characteristics—5-V VCC1 and VCC2 Supplies
    15. 7.15 Switching Characteristics—5-V VCC1 and 3.3-V VCC2 Supply
    16. 7.16 Switching Characteristics—3.3-V CC1 and 5-V VCC2 Supplies
    17. 7.17 Switching Characteristics—3.3-V VCC1 and VCC2 Supplies
    18. 7.18 Switching Characteristics—2.8-V VCC1 and VCC2 Supplies
    19. 7.19 Insulation Characteristics Curves
    20. 7.20 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Material
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 開発サポート
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 関連リンク
    4. 13.4 ドキュメントの更新通知を受け取る方法
    5. 13.5 コミュニティ・リソース
    6. 13.6 商標
    7. 13.7 静電気放電に関する注意事項
    8. 13.8 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4 Thermal Information

THERMAL METRIC(1) ISO7220x
ISO7221x		 UNIT
D (SOIC)
8 PINS
RθJA Junction-to-ambient thermal resistance Low-K Thermal Resistance(2) 212 °C/W
High-K Thermal Resistance 122
RθJC(top) Junction-to-case (top) thermal resistance 69.1 °C/W
RθJB Junction-to-board thermal resistance 47.7 °C/W
ψJT Junction-to-top characterization parameter 15.2 °C/W
ψJB Junction-to-board characterization parameter 47.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
(2) Tested in accordance with the Low-K or High-K thermal metric definitions of EIA/JESD51-3 for leaded surface mount packages.