JAJSCD9D July   2016  – December 2017 LM5141-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High Voltage Start-up Regulator
      2. 7.3.2  VCC Regulator
      3. 7.3.3  Oscillator
      4. 7.3.4  Synchronization
      5. 7.3.5  Frequency Dithering (Spread Spectrum)
      6. 7.3.6  Enable
      7. 7.3.7  Power Good
      8. 7.3.8  Output Voltage
        1. 7.3.8.1 Minimum Output Voltage Adjustment
      9. 7.3.9  Current Sense
      10. 7.3.10 DCR Current Sensing
      11. 7.3.11 Error Amplifier and PWM Comparator
      12. 7.3.12 Slope Compensation
      13. 7.3.13 Hiccup Mode Current Limiting
      14. 7.3.14 Standby Mode
      15. 7.3.15 Soft Start
      16. 7.3.16 Diode Emulation
      17. 7.3.17 High- and Low-Side Drivers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Inductor Calculation
        3. 8.2.2.3 Current Sense Resistor
        4. 8.2.2.4 Output Capacitor
        5. 8.2.2.5 Input Filter
          1. 8.2.2.5.1 EMI Filter Design
          2. 8.2.2.5.2 MOSFET Selection
          3. 8.2.2.5.3 Driver Slew-Rate Control
          4. 8.2.2.5.4 Frequency Dithering
        6. 8.2.2.6 Control Loop
          1. 8.2.2.6.1 Feedback Compensator
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Layout Procedure
    2. 10.2 Layout Examples
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGE|24
サーマルパッド・メカニカル・データ
発注情報

6.7 Typical Characteristics

At TA = 25ºC, unless otherwise noted
LM5141-Q1 D001_SNVSAJ6.gif
VIN 8–18 V EN = 12 V 2.2 MHz
VOUT 5 V FPWM
Figure 1. Efficiency vs IOUT
LM5141-Q1 D003_SNVSAJ6.gif
EN = 12 V
Figure 3. ISTANDBY vs VIN
LM5141-Q1 D005_SNVSAJ6.gif
VIN 6-18 V EN = GND
Figure 5. VCC(REG) vs VIN
LM5141-Q1 D007_SNVSAJ6.gif
VCC Rising EN = 12 V
Figure 7. VDD(REG) vs Temperature
LM5141-Q1 D009_SNVSAJ6.gif
VCC Rising EN = 12 V
Figure 9. VCCX(ON) vs Temperature
LM5141-Q1 D011_SNVSAJ6.gif
VIN 12 V FB = VDDA EN = 12 V
Figure 11. 3.3-V Output Voltage Regulation vs IOUT
LM5141-Q1 D013_SNVSAJ6.gif
VIN 12 V EN = 12 V OSC = VDDA
Figure 13. 2.2-MHz Oscillator Frequency vs Temperature
LM5141-Q1 D015_SNVSAJ6.gif
VIN 18 V
Figure 15. ton Minimum vs Temperature
LM5141-Q1 D017_SNVSAJ6.gif
VIN 12 V
Figure 17. RT Frequency vs Temperature (2.2 MHz)
LM5141-Q1 D002_SNVSAJ6.gif
VIN 8–18 V EN = 12 V 2.2 MHz
VOUT 5 V DEMB
Figure 2. Efficiency vs IOUT
LM5141-Q1 D004_SNVSAJ6.gif
VIN 8–18 V EN = 0 V
Figure 4. ISHUTDOWN vs Temperature
LM5141-Q1 D006_SNVSAJ6.gif
VIN 8–18 V EN = 12 V
Figure 6. VCC(UVLO) vs Temperature
LM5141-Q1 D008_SNVSAJ6.gif
VCC Rising EN = 12 V
Figure 8. VDD(UVLO) vs Temperature
LM5141-Q1 D010_SNVSAJ6.gif
VIN 12 V EN = 12 V
Figure 10. Current Sense Amplifier Gain vs Temperature
LM5141-Q1 D012_SNVSAJ6.gif
VIN 12 V EN = 12 V FB = GND
Figure 12. 5-V Output Voltage Regulation vs IOUT
LM5141-Q1 D014_SNVSAJ6.gif
VIN 12 V EN = 12 V OSC = AGND
Figure 14. 440-kHz Oscillator Frequency vs Temperature
LM5141-Q1 D016_SNVSAJ6.gif
VIN 3.8 V VOUT 3.3 V
Figure 16. toff Minimum vs Temperature
LM5141-Q1 D018_SNVSAJ6.gif
VIN 12 V
Figure 18. RT Frequency vs Temperature (440 kHz)