JAJSE93B March   2016  – November 2017 LM5161

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的な降圧アプリケーション回路
      2.      代表的なFly-Buckアプリケーション回路
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Control Circuit
      2. 7.3.2  VCC Regulator
      3. 7.3.3  Regulation Comparator
      4. 7.3.4  Soft-Start
      5. 7.3.5  Error Transconductance (GM) Amplifier
      6. 7.3.6  On-Time Generator
      7. 7.3.7  Current Limit
      8. 7.3.8  N-Channel Buck Switch and Driver
      9. 7.3.9  Synchronous Rectifier
      10. 7.3.10 Enable / Undervoltage Lockout (EN/UVLO)
      11. 7.3.11 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Forced Pulse Width Modulation (FPWM) Mode
      2. 7.4.2 Undervoltage Detector
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 LM5161 Synchronous Buck (15-V to 95-V Input, 12-V Output, 1-A Load)
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Output Resistor Divider Selection
          3. 8.2.1.2.3  Frequency Selection
          4. 8.2.1.2.4  Inductor Selection
          5. 8.2.1.2.5  Output Capacitor Selection
          6. 8.2.1.2.6  Series Ripple Resistor - RESR (FPWM = 1)
          7. 8.2.1.2.7  VCC and Bootstrap Capacitor
          8. 8.2.1.2.8  Input Capacitor Selection
          9. 8.2.1.2.9  Soft-Start Capacitor Selection
          10. 8.2.1.2.10 EN/UVLO Resistor Selection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 LM5161 Isolated Fly-Buck (36-V to 72-V Input, 12-V, 12-W Isolated Output)
        1. 8.2.2.1 LM5161 Fly-Buck Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Selection of VOUT and Turns Ratio
          2. 8.2.2.2.2 Secondary Rectifier Diode
          3. 8.2.2.2.3 External Ripple Circuit
          4. 8.2.2.2.4 Output Capacitor (CVISO)
        3. 8.2.2.3 Application Curves
      3. 8.2.3 Ripple Configuration
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Selection of VOUT and Turns Ratio

The primary output voltage in a Fly-Buck converter should be no more than one half of the minimum input voltage. Therefore, at the minimum VIN of 36 V, the primary output voltage ( VOUT ) should be no higher than 18 V. The isolated output voltage of VOUTISO in Figure 34 is set at 12 V by selecting a transformer with a turns ratio (N1:N2 :: NPRI:NSEC) of 1:1. Using this turns ratio, the required primary output voltage VOUT is calculated in Equation 19:

Equation 19. LM5161 eq3_snvu505.gif

The 0.7 V (VFD1) added to VOUTISO in Equation 19 represents the forward voltage drop of the secondary rectifier diode. By setting the primary output voltage VOUT to 12.7-V by selecting the correct feedback resistors, the secondary voltage is regulated at 12-V nominally. Adjustment of the primary side VOUT may be required to compensate for voltage errors due to the leakage inductance of the transformer, the resistance of the transformer windings, the diode drop in the power path on the secondary side and the low-side FET of the LM5161.