JAJSKV0 December   2020 LM74500-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  7. 7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage
      2. 8.3.2 Charge Pump
      3. 8.3.3 Gate Driver
      4. 8.3.4 Enable
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Conduction Mode
  9. 9 Application and Implementation
    1. 9.1 Reverse Battery Protection for Automotive Body Control Module Applications
    2. 9.2 Reverse Polarity Protection
    3. 9.3 Application Information
      1. 9.3.1 Typical Application
        1. 9.3.1.1 Design Requirements
        2. 9.3.1.2 Detailed Design Procedure
          1. 9.3.1.2.1 Design Considerations
          2. 9.3.1.2.2 MOSFET Selection
          3. 9.3.1.2.3 Charge Pump VCAP, Input and Output Capacitance
        3. 9.3.1.3 Selection of TVS Diodes for 12-V Battery Protection Applications
        4. 9.3.1.4 Selection of TVS Diodes and MOSFET for 24-V Battery Protection Applications
        5. 9.3.1.5 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Switching Characteristics

TJ = –40°C to +125°C; typical values at TJ = 25°C, V(SOURCE) = 12 V, CIN = C(VCAP) = COUT = 0.1 µF, V(EN) = 3.3 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ENTDLY Enable (low to high) to Gate Turn On delay V(VCAP) > V(VCAP UVLOR) 75 110 µs