JAJSFG5D November   2008  – May 2018 LM7705

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーション
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 3.3-V Electrical Characteristics
    6. 6.6 5-V Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Supply Voltage
      2. 7.3.2 Output Voltage and Line Regulation
      3. 7.3.3 Output Current and Load Regulation
      4. 7.3.4 Quiescent Current
    4. 7.4 Device Functional Modes
      1. 7.4.1 General Amplifier Application
        1. 7.4.1.1 One-Stage, Single-Supply True Zero Amplifier
        2. 7.4.1.2 Two-Stage, Single-Supply True Zero Amplifier
        3. 7.4.1.3 Dual-Supply, True Zero Amplifiers
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Functional Description
      2. 8.1.2 Technical Description
      3. 8.1.3 Charge Pump Theory
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Basic Setup
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 コミュニティ・リソース
    2. 11.2 商標
    3. 11.3 静電気放電に関する注意事項
    4. 11.4 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Two-Stage, Single-Supply True Zero Amplifier

This sensor application produces a DC signal, amplified by a two cascaded op amps, having a single supply. The output voltage of the second op amp is converted to the digital domain. Figure 25 shows the basic setup of this application.

LM7705 20173036.gifFigure 25. Sensor With DC Output and a 2-Stage, Single-Supply Op Amp

The sensor generates a DC output signal. In this case, a DC coupled, 2-stage amplifier is used. The output voltage swing of the second op amp must me matched to the input voltage range of the Analog to Digital Converter (ADC). For the high side of the range this can be done by adjusting the gain of the op amp. However, the low side of the range can’t be adjusted and is affected by the output drive of the op amp.

Example:

Assume; the output voltage range of the sensor is 0 to 90 mV. The available op amp is a LMP7702 (Dual LMP7701 op amp) that can be used for A1 and A2. The op amp is using a 0/+5-V supply voltage, having an output drive of 50 mV from both rails. This results in an output range of 50 mV to 4.95 V for each individual amplifier.

Select two resistors values for RG1 and RF1 that result in a gain of 10x for the first stage (A1) and a gain of 5x for the second stage (A2) The output of the A2 in the LMP7702 must swing from 0V to 4.5 V. This swing is limited by the 2 different factors:

  1. The high voltage swing is no problem; however the low voltage swing is limited by the output saturation voltage of A2 from the LM7702 and will not go below 50 mV instead of the desired 0 V.
  2. Another effect has more impact. The output saturation voltage of the first stage will cause an offset for the input of the second stage. This offset of A1 is amplified by the gain of the second stage (10x in this example), resulting in an output offset voltage of 500mV. This is significantly more that the 50 mV (VDSAT) of A2.

When using a 12-bit ADC, and a reference voltage of 5 Volt (having an ADC step size of approximate 1.2 mV), the output saturation results in a loss of the lower 400 quantization levels of the ADCs dynamic range. This will cause a major non-linearity in the sensor reading.