SNAS785B November   2019  – June 2020 LMX2694-EP

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. Table 1. Absolute Maximum Ratings
    2. Table 2. ESD Ratings
      1. Table 3. Recommended Operating Conditions
    3. Table 4. Thermal Information
    4. Table 5. Electrical Characteristics
    5. Table 6. Timing Requirements
    6. 6.1      Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Reference Oscillator Input
      2. 7.3.2  Reference Path
        1. 7.3.2.1 OSCIN Doubler (OSC_2X)
        2. 7.3.2.2 Pre-R Divider (PLL_R_PRE)
        3. 7.3.2.3 Post-R Divider (PLL_R)
      3. 7.3.3  State Machine Clock
      4. 7.3.4  PLL Phase Detector and Charge Pump
      5. 7.3.5  N Divider and Fractional Circuitry
      6. 7.3.6  MUXOUT Pin
        1. 7.3.6.1 Serial Data Output for Readback
        2. 7.3.6.2 Lock Detect Indicator Set as Type “VCOCal”
        3. 7.3.6.3 Lock Detect Indicator Set as Type “Vtune and VCOCal”
      7. 7.3.7  VCO (Voltage-Controlled Oscillator)
        1. 7.3.7.1 VCO Calibration
        2. 7.3.7.2 Determining the VCO Gain
      8. 7.3.8  Channel Divider
      9. 7.3.9  Output Buffer
      10. 7.3.10 Powerdown Modes
      11. 7.3.11 Treatment of Unused Pins
      12. 7.3.12 Phase Synchronization
        1. 7.3.12.1 General Concept
        2. 7.3.12.2 Categories of Applications for SYNC
        3. 7.3.12.3 Procedure for Using SYNC
        4. 7.3.12.4 SYNC Input Pin
      13. 7.3.13 Phase Adjust
      14. 7.3.14 Fine Adjustments for Phase Adjust and Phase SYNC
      15. 7.3.15 SYSREF
        1. 7.3.15.1 Programmable Fields
        2. 7.3.15.2 Input and Output Pin Formats
          1. 7.3.15.2.1 SYSREF Output Format
        3. 7.3.15.3 SYSREF Examples
        4. 7.3.15.4 SYSREF Procedure
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Recommended Initial Power-Up Sequence
      2. 7.5.2 Recommended Sequence for Changing Frequencies
    6. 7.6 Register Maps
      1. 7.6.1   R0 Register (Offset = 0x0) [reset = 0x200C]
        1. Table 26. R0 Register Field Descriptions
      2. 7.6.2   R1 Register (Offset = 0x1) [reset = 0x80C]
        1. Table 27. R1 Register Field Descriptions
      3. 7.6.3   R2 Register (Offset = 0x2) [reset = 0x500]
        1. Table 28. R2 Register Field Descriptions
      4. 7.6.4   R3 Register (Offset = 0x3) [reset = 0x642]
        1. Table 29. R3 Register Field Descriptions
      5. 7.6.5   R4 Register (Offset = 0x4) [reset = 0xA43]
        1. Table 30. R4 Register Field Descriptions
      6. 7.6.6   R5 Register (Offset = 0x5) [reset = 0xC8]
        1. Table 31. R5 Register Field Descriptions
      7. 7.6.7   R6 Register (Offset = 0x6) [reset = 0xC802]
        1. Table 32. R6 Register Field Descriptions
      8. 7.6.8   R7 Register (Offset = 0x7) [reset = 0xB2]
        1. Table 33. R7 Register Field Descriptions
      9. 7.6.9   R8 Register (Offset = 0x8) [reset = 0x2000]
        1. Table 34. R8 Register Field Descriptions
      10. 7.6.10  R9 Register (Offset = 0x9) [reset = 0x604]
        1. Table 35. R9 Register Field Descriptions
      11. 7.6.11  R10 Register (Offset = 0xA) [reset = 0x10F8]
        1. Table 36. R10 Register Field Descriptions
      12. 7.6.12  R11 Register (Offset = 0xB) [reset = 0x18]
        1. Table 37. R11 Register Field Descriptions
      13. 7.6.13  R12 Register (Offset = 0xC) [reset = 0x5001]
        1. Table 38. R12 Register Field Descriptions
      14. 7.6.14  R13 Register (Offset = 0xD) [reset = 0x4000]
        1. Table 39. R13 Register Field Descriptions
      15. 7.6.15  R14 Register (Offset = 0xE) [reset = 0x1E70]
        1. Table 40. R14 Register Field Descriptions
      16. 7.6.16  R15 Register (Offset = 0xF) [reset = 0x64F]
        1. Table 41. R15 Register Field Descriptions
      17. 7.6.17  R16 Register (Offset = 0x10) [reset = 0x80]
        1. Table 42. R16 Register Field Descriptions
      18. 7.6.18  R17 Register (Offset = 0x11) [reset = 0x96]
        1. Table 43. R17 Register Field Descriptions
      19. 7.6.19  R18 Register (Offset = 0x12) [reset = 0x64]
        1. Table 44. R18 Register Field Descriptions
      20. 7.6.20  R19 Register (Offset = 0x13) [reset = 0x27B7]
        1. Table 45. R19 Register Field Descriptions
      21. 7.6.21  R20 Register (Offset = 0x14) [reset = 0x3048]
        1. Table 46. R20 Register Field Descriptions
      22. 7.6.22  R21 Register (Offset = 0x15) [reset = 0x401]
        1. Table 47. R21 Register Field Descriptions
      23. 7.6.23  R22 Register (Offset = 0x16) [reset = 0x1]
        1. Table 48. R22 Register Field Descriptions
      24. 7.6.24  R23 Register (Offset = 0x17) [reset = 0x7C]
        1. Table 49. R23 Register Field Descriptions
      25. 7.6.25  R24 Register (Offset = 0x18) [reset = 0x71A]
        1. Table 50. R24 Register Field Descriptions
      26. 7.6.26  R25 Register (Offset = 0x19) [reset = 0x624]
        1. Table 51. R25 Register Field Descriptions
      27. 7.6.27  R26 Register (Offset = 0x1A) [reset = 0xDB0]
        1. Table 52. R26 Register Field Descriptions
      28. 7.6.28  R27 Register (Offset = 0x1B) [reset = 0x2]
        1. Table 53. R27 Register Field Descriptions
      29. 7.6.29  R28 Register (Offset = 0x1C) [reset = 0x488]
        1. Table 54. R28 Register Field Descriptions
      30. 7.6.30  R29 Register (Offset = 0x1D) [reset = 0x318C]
        1. Table 55. R29 Register Field Descriptions
      31. 7.6.31  R30 Register (Offset = 0x1E) [reset = 0x318C]
        1. Table 56. R30 Register Field Descriptions
      32. 7.6.32  R31 Register (Offset = 0x1F) [reset = 0xC3EC]
        1. Table 57. R31 Register Field Descriptions
      33. 7.6.33  R32 Register (Offset = 0x20) [reset = 0x393]
        1. Table 58. R32 Register Field Descriptions
      34. 7.6.34  R33 Register (Offset = 0x21) [reset = 0x1E21]
        1. Table 59. R33 Register Field Descriptions
      35. 7.6.35  R34 Register (Offset = 0x22) [reset = 0x10]
        1. Table 60. R34 Register Field Descriptions
      36. 7.6.36  R35 Register (Offset = 0x23) [reset = 0x4]
        1. Table 61. R35 Register Field Descriptions
      37. 7.6.37  R36 Register (Offset = 0x24) [reset = 0x70]
        1. Table 62. R36 Register Field Descriptions
      38. 7.6.38  R37 Register (Offset = 0x25) [reset = 0x205]
        1. Table 63. R37 Register Field Descriptions
      39. 7.6.39  R38 Register (Offset = 0x26) [reset = 0xFFFF]
        1. Table 64. R38 Register Field Descriptions
      40. 7.6.40  R39 Register (Offset = 0x27) [reset = 0xFFFF]
        1. Table 65. R39 Register Field Descriptions
      41. 7.6.41  R40 Register (Offset = 0x28) [reset = 0x0]
        1. Table 66. R40 Register Field Descriptions
      42. 7.6.42  R41 Register (Offset = 0x29) [reset = 0x0]
        1. Table 67. R41 Register Field Descriptions
      43. 7.6.43  R42 Register (Offset = 0x2A) [reset = 0x0]
        1. Table 68. R42 Register Field Descriptions
      44. 7.6.44  R43 Register (Offset = 0x2B) [reset = 0x0]
        1. Table 69. R43 Register Field Descriptions
      45. 7.6.45  R44 Register (Offset = 0x2C) [reset = 0x22A2]
        1. Table 70. R44 Register Field Descriptions
      46. 7.6.46  R45 Register (Offset = 0x2D) [reset = 0xC622]
        1. Table 71. R45 Register Field Descriptions
      47. 7.6.47  R46 Register (Offset = 0x2E) [reset = 0x7F0]
        1. Table 72. R46 Register Field Descriptions
      48. 7.6.48  R47 Register (Offset = 0x2F) [reset = 0x300]
        1. Table 73. R47 Register Field Descriptions
      49. 7.6.49  R48 Register (Offset = 0x30) [reset = 0x3E0]
        1. Table 74. R48 Register Field Descriptions
      50. 7.6.50  R49 Register (Offset = 0x31) [reset = 0x4180]
        1. Table 75. R49 Register Field Descriptions
      51. 7.6.51  R50 Register (Offset = 0x32) [reset = 0x80]
        1. Table 76. R50 Register Field Descriptions
      52. 7.6.52  R51 Register (Offset = 0x33) [reset = 0x80]
        1. Table 77. R51 Register Field Descriptions
      53. 7.6.53  R52 Register (Offset = 0x34) [reset = 0x420]
        1. Table 78. R52 Register Field Descriptions
      54. 7.6.54  R53 Register (Offset = 0x35) [reset = 0x0]
        1. Table 79. R53 Register Field Descriptions
      55. 7.6.55  R54 Register (Offset = 0x36) [reset = 0x0]
        1. Table 80. R54 Register Field Descriptions
      56. 7.6.56  R55 Register (Offset = 0x37) [reset = 0x0]
        1. Table 81. R55 Register Field Descriptions
      57. 7.6.57  R56 Register (Offset = 0x38) [reset = 0x0]
        1. Table 82. R56 Register Field Descriptions
      58. 7.6.58  R57 Register (Offset = 0x39) [reset = 0x0]
        1. Table 83. R57 Register Field Descriptions
      59. 7.6.59  R58 Register (Offset = 0x3A) [reset = 0x8001]
        1. Table 84. R58 Register Field Descriptions
      60. 7.6.60  R59 Register (Offset = 0x3B) [reset = 0x1]
        1. Table 85. R59 Register Field Descriptions
      61. 7.6.61  R60 Register (Offset = 0x3C) [reset = 0x3E8]
        1. Table 86. R60 Register Field Descriptions
      62. 7.6.62  R61 Register (Offset = 0x3D) [reset = 0xA8]
        1. Table 87. R61 Register Field Descriptions
      63. 7.6.63  R62 Register (Offset = 0x3E) [reset = 0xAE]
        1. Table 88. R62 Register Field Descriptions
      64. 7.6.64  R63 Register (Offset = 0x3F) [reset = 0x0]
        1. Table 89. R63 Register Field Descriptions
      65. 7.6.65  R64 Register (Offset = 0x40) [reset = 0x1388]
        1. Table 90. R64 Register Field Descriptions
      66. 7.6.66  R65 Register (Offset = 0x41) [reset = 0x0]
        1. Table 91. R65 Register Field Descriptions
      67. 7.6.67  R66 Register (Offset = 0x42) [reset = 0x140]
        1. Table 92. R66 Register Field Descriptions
      68. 7.6.68  R67 Register (Offset = 0x43) [reset = 0x0]
        1. Table 93. R67 Register Field Descriptions
      69. 7.6.69  R68 Register (Offset = 0x44) [reset = 0x3E8]
        1. Table 94. R68 Register Field Descriptions
      70. 7.6.70  R69 Register (Offset = 0x45) [reset = 0x0]
        1. Table 95. R69 Register Field Descriptions
      71. 7.6.71  R70 Register (Offset = 0x46) [reset = 0xC350]
        1. Table 96. R70 Register Field Descriptions
      72. 7.6.72  R71 Register (Offset = 0x47) [reset = 0x80]
        1. Table 97. R71 Register Field Descriptions
      73. 7.6.73  R72 Register (Offset = 0x48) [reset = 0x1]
        1. Table 98. R72 Register Field Descriptions
      74. 7.6.74  R73 Register (Offset = 0x49) [reset = 0x3F]
        1. Table 99. R73 Register Field Descriptions
      75. 7.6.75  R74 Register (Offset = 0x4A) [reset = 0x0]
        1. Table 100. R74 Register Field Descriptions
      76. 7.6.76  R75 Register (Offset = 0x4B) [reset = 0x800]
        1. Table 101. R75 Register Field Descriptions
      77. 7.6.77  R76 Register (Offset = 0x4C) [reset = 0xC]
        1. Table 102. R76 Register Field Descriptions
      78. 7.6.78  R77 Register (Offset = 0x4D) [reset = 0x0]
        1. Table 103. R77 Register Field Descriptions
      79. 7.6.79  R78 Register (Offset = 0x4E) [reset = 0x64]
        1. Table 104. R78 Register Field Descriptions
      80. 7.6.80  R79 Register (Offset = 0x4F) [reset = 0x0]
        1. Table 105. R79 Register Field Descriptions
      81. 7.6.81  R80 Register (Offset = 0x50) [reset = 0x0]
        1. Table 106. R80 Register Field Descriptions
      82. 7.6.82  R81 Register (Offset = 0x51) [reset = 0x0]
        1. Table 107. R81 Register Field Descriptions
      83. 7.6.83  R82 Register (Offset = 0x52) [reset = 0x0]
        1. Table 108. R82 Register Field Descriptions
      84. 7.6.84  R83 Register (Offset = 0x53) [reset = 0x0]
        1. Table 109. R83 Register Field Descriptions
      85. 7.6.85  R84 Register (Offset = 0x54) [reset = 0x0]
        1. Table 110. R84 Register Field Descriptions
      86. 7.6.86  R85 Register (Offset = 0x55) [reset = 0x0]
        1. Table 111. R85 Register Field Descriptions
      87. 7.6.87  R86 Register (Offset = 0x56) [reset = 0x0]
        1. Table 112. R86 Register Field Descriptions
      88. 7.6.88  R87 Register (Offset = 0x57) [reset = 0x0]
        1. Table 113. R87 Register Field Descriptions
      89. 7.6.89  R88 Register (Offset = 0x58) [reset = 0x0]
        1. Table 114. R88 Register Field Descriptions
      90. 7.6.90  R89 Register (Offset = 0x59) [reset = 0x0]
        1. Table 115. R89 Register Field Descriptions
      91. 7.6.91  R90 Register (Offset = 0x5A) [reset = 0x0]
        1. Table 116. R90 Register Field Descriptions
      92. 7.6.92  R91 Register (Offset = 0x5B) [reset = 0x0]
        1. Table 117. R91 Register Field Descriptions
      93. 7.6.93  R92 Register (Offset = 0x5C) [reset = 0x0]
        1. Table 118. R92 Register Field Descriptions
      94. 7.6.94  R93 Register (Offset = 0x5D) [reset = 0x0]
        1. Table 119. R93 Register Field Descriptions
      95. 7.6.95  R94 Register (Offset = 0x5E) [reset = 0x0]
        1. Table 120. R94 Register Field Descriptions
      96. 7.6.96  R95 Register (Offset = 0x5F) [reset = 0x0]
        1. Table 121. R95 Register Field Descriptions
      97. 7.6.97  R96 Register (Offset = 0x60) [reset = 0x0]
        1. Table 122. R96 Register Field Descriptions
      98. 7.6.98  R97 Register (Offset = 0x61) [reset = 0x0]
        1. Table 123. R97 Register Field Descriptions
      99. 7.6.99  R98 Register (Offset = 0x62) [reset = 0x0]
        1. Table 124. R98 Register Field Descriptions
      100. 7.6.100 R99 Register (Offset = 0x63) [reset = 0x0]
        1. Table 125. R99 Register Field Descriptions
      101. 7.6.101 R100 Register (Offset = 0x64) [reset = 0x0]
        1. Table 126. R100 Register Field Descriptions
      102. 7.6.102 R101 Register (Offset = 0x65) [reset = 0x0]
        1. Table 127. R101 Register Field Descriptions
      103. 7.6.103 R102 Register (Offset = 0x66) [reset = 0x0]
        1. Table 128. R102 Register Field Descriptions
      104. 7.6.104 R103 Register (Offset = 0x67) [reset = 0x0]
        1. Table 129. R103 Register Field Descriptions
      105. 7.6.105 R104 Register (Offset = 0x68) [reset = 0x0]
        1. Table 130. R104 Register Field Descriptions
      106. 7.6.106 R105 Register (Offset = 0x69) [reset = 0x440]
        1. Table 131. R105 Register Field Descriptions
      107. 7.6.107 R106 Register (Offset = 0x6A) [reset = 0x7]
        1. Table 132. R106 Register Field Descriptions
      108. 7.6.108 R107 Register (Offset = 0x6B) [reset = 0x0]
        1. Table 133. R107 Register Field Descriptions
      109. 7.6.109 R108 Register (Offset = 0x6C) [reset = 0x0]
        1. Table 134. R108 Register Field Descriptions
      110. 7.6.110 R109 Register (Offset = 0x6D) [reset = 0x0]
        1. Table 135. R109 Register Field Descriptions
      111. 7.6.111 R110 Register (Offset = 0x6E) [reset = 0x0]
        1. Table 136. R110 Register Field Descriptions
      112. 7.6.112 R111 Register (Offset = 0x6F) [reset = 0x0]
        1. Table 137. R111 Register Field Descriptions
      113. 7.6.113 R112 Register (Offset = 0x70) [reset = 0x0]
        1. Table 138. R112 Register Field Descriptions
      114. 7.6.114 R113 Register (Offset = 0x71) [reset = 0x0]
        1. Table 139. R113 Register Field Descriptions
      115. 7.6.115 R114 Register (Offset = 0x72) [reset = 0x0]
        1. Table 140. R114 Register Field Descriptions
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 OSCIN Configuration
      2. 8.1.2 OSCIN Slew Rate
      3. 8.1.3 RF Output Buffer Power Control
      4. 8.1.4 RF Output Buffer Pullup
        1. 8.1.4.1 Resistor Pullup
        2. 8.1.4.2 Inductor Pullup
        3. 8.1.4.3 Combination Pullup
      5. 8.1.5 RF Output Treatment for the Complimentary Side
        1. 8.1.5.1 Single-Ended Termination of Unused Output
        2. 8.1.5.2 Differential Termination
      6. 8.1.6 External Loop Filter
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ(パッケージ|ピン)
  • RTC|48
サーマルパッド・メカニカル・データ
発注情報

Features

  • 39.3-MHz to 15.1-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 54-fs RMS jitter at 8 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • Up to 200-MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • 3.3-V single power supply operation
  • Operating temperature range: –55°C to 125°C