SLVSCN6A November 2014 – December 2014 MSP430FR5739-EP
PRODUCTION DATA.
PIN NAME (P1.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P1DIR.x | P1SEL1.x | P1SEL0.x | |||
P1.0/TA0.1/DMAE0/RTCCLK/A0/CD0/VeREF- | 0 | P1.0 (I/O) | I: 0; O: 1 | 0 | 0 |
TA0.CCI1A | 0 | 0 | 1 | ||
TA0.1 | 1 | ||||
DMAE0 | 0 | 1 | 0 | ||
RTCCLK | 1 | ||||
A0 (1)(3)
CD0 (1)(2) VeREF- (1)(3) |
X | 1 | 1 | ||
P1.1/TA0.2/TA1CLK/CDOUT/A1/CD1/VeREF+ | 1 | P1.1 (I/O) | I: 0; O: 1 | 0 | 0 |
TA0.CCI2A | 0 | 0 | 1 | ||
TA0.2 | 1 | ||||
TA1CLK | 0 | 1 | 0 | ||
CDOUT | 1 | ||||
A1 (1)(3)
CD1 (1)(2) VeREF+ (1)(3) |
X | 1 | 1 | ||
P1.2/TA1.1/TA0CLK/CDOUT/A2/CD2 | 2 | P1.2 (I/O) | I: 0; O: 1 | 0 | 0 |
TA1.CCI1A | 0 | 0 | 1 | ||
TA1.1 | 1 | ||||
TA0CLK | 0 | 1 | 0 | ||
CDOUT | 1 | ||||
A2 (1)(3)
CD2 (1)(2) |
X | 1 | 1 |
PIN NAME (P1.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P1DIR.x | P1SEL1.x | P1SEL0.x | |||
P1.3/TA1.2/UCB0STE/A3/CD3 | 3 | P1.3 (I/O) | I: 0; O: 1 | 0 | 0 |
TA1.CCI2A | 0 | 0 | 1 | ||
TA1.2 | 1 | ||||
UCB0STE | X (1) | 1 | 0 | ||
A3 (3)(5)
CD3 (3)(4) |
X | 1 | 1 | ||
P1.4/TB0.1/UCA0STE/A4/CD4 | 4 | P1.4 (I/O) | I: 0; O: 1 | 0 | 0 |
TB0.CCI1A | 0 | 0 | 1 | ||
TB0.1 | 1 | ||||
UCA0STE | X (2) | 1 | 0 | ||
A4 (3)(5)
CD4 (3)(4) |
X | 1 | 1 | ||
P1.5/TB0.2/UCA0CLK/A5/CD5 | 5 | P1.5(I/O) | I: 0; O: 1 | 0 | 0 |
TB0.CCI2A | 0 | 0 | 1 | ||
TB0.2 | 1 | ||||
UCA0CLK | X (2) | 1 | 0 | ||
A5 (3)(5)
CD5 (3)(4) |
X | 1 | 1 |
PIN NAME (P1.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P1DIR.x | P1SEL1.x | P1SEL0.x | |||
P1.6/TB1.1/UCB0SIMO/UCB0SDA/TA0.0 | 6 | P1.6 (I/O) | I: 0; O: 1 | 0 | 0 |
TB1.CCI1A (2) | 0 | 0 | 1 | ||
TB1.1 (2) | 1 | ||||
UCB0SIMO/UCB0SDA | X (1) | 1 | 0 | ||
TA0.CCI0A | 0 | 1 | 1 | ||
TA0.0 | 1 | ||||
P1.7/TB1.2/UCB0SOMI/UCB0SCL/TA1.0 | 7 | P1.7 (I/O) | I: 0; O: 1 | 0 | 0 |
TB1.CCI2A (2) | 0 | 0 | 1 | ||
TB1.2 (2) | 1 | ||||
UCB0SOMI/UCB0SCL | X(1) | 1 | 0 | ||
TA1.CCI0A | 0 | 1 | 1 | ||
TA1.0 | 1 |
PIN NAME (P2.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P2DIR.x | P2SEL1.x | P2SEL0.x | |||
P2.0/TB2.0/UCA0TXD/UCA0SIMO/TB0CLK/ACLK | 0 | P2.0 (I/O) | I: 0; O: 1 | 0 | 0 |
TB2.CCI0A (3) | 0 | 0 | 1 | ||
TB2.0 (3) | 1 | ||||
UCA0TXD/UCA0SIMO | X (1) | 1 | 0 | ||
TB0CLK | 0 | 1 | 1 | ||
ACLK | 1 | ||||
P2.1/TB2.1/UCA0RXD/UCA0SOMI/TB0.0 | 1 | P2.1 (I/O) | I: 0; O: 1 | 0 | 0 |
TB2.CCI1A (3) | 0 | 0 | 1 | ||
TB2.1 (3) | 1 | ||||
UCA0RXD/UCA0SOMI | X (1) | 1 | 0 | ||
TB0.CCI0A | 0 | 1 | 1 | ||
TB0.0 | 1 | ||||
P2.2/TB2.2/UCB0CLK/TB1.0 | 2 | P2.2 (I/O) | I: 0; O: 1 | 0 | 0 |
TB2.CCI2A (3) | 0 | 0 | 1 | ||
TB2.2 (3) | 1 | ||||
UCB0CLK | X (2) | 1 | 0 | ||
TB1.CCI0A (3) | 0 | 1 | 1 | ||
TB1.0 (3) | 1 |
PIN NAME (P2.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P2DIR.x | P2SEL1.x | P2SEL0.x | |||
P2.3/TA0.0/UCA1STE/A6/CD10 | 3 | P2.3 (I/O) | I: 0; O: 1 | 0 | 0 |
TA0.CCI0B | 0 | 0 | 1 | ||
TA0.0 | 1 | ||||
UCA1STE | X (1) | 1 | 0 | ||
A6 (2)(4)
CD10 (2)(3) |
X | 1 | 1 | ||
P2.4/TA1.0/UCA1CLK/A7/CD11 | 4 | P2.4 (I/O) | I: 0; O: 1 | 0 | 0 |
TA1.CCI0B | 0 | 0 | 1 | ||
TA1.0 | 1 | ||||
UCA1CLK | X (1) | 1 | 0 | ||
A7 (2)(4)
CD11 (2)(3) |
X | 1 | 1 |
PIN NAME (P2.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P2DIR.x | P2SEL1.x | P2SEL0.x | |||
P2.5/TB0.0/UCA1TXD/UCA1SIMO | 5 | P2.5(I/O) (2) | I: 0; O: 1 | 0 | 0 |
TB0.CCI0B (2) | 0 | 0 | 1 | ||
TB0.0 (2) | 1 | ||||
UCA1TXD/UCA1SIMO (2) | X (1) | 1 | 0 | ||
P2.6/TB1.0/UCA1RXD/UCA1SOMI | 6 | P2.6(I/O) (2) | I: 0; O: 1 | 0 | 0 |
TB1.CCI0B (2) | 0 | 0 | 1 | ||
TB1.0 (2) | 1 | ||||
UCA1RXD/UCA1SOMI (2) | X (1) | 1 | 0 |
PIN NAME (P2.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P2DIR.x | P2SEL1.x | P2SEL0.x | |||
P2.7 | 7 | P2.7(I/O) (1) | I: 0; O: 1 | 0 | 0 |
PIN NAME (P3.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P3DIR.x | P3SEL1.x | P3SEL0.x | |||
P3.0/A12/CD12 | 0 | P3.0 (I/O) | I: 0; O: 1 | 0 | 0 |
A12 (1)(3)
CD12 (1)(2) |
X | 1 | 1 | ||
P3.1/A13/CD13 | 1 | P3.1 (I/O) | I: 0; O: 1 | 0 | 0 |
A13 (1)(3)
CD13 (1)(2) |
X | 1 | 1 | ||
P3.2/A14/CD14 | 2 | P3.2 (I/O) | I: 0; O: 1 | 0 | 0 |
A14 (1)(3)
CD14 (1)(2) |
X | 1 | 1 | ||
P3.3/A15/CD15 | 3 | P3.3 (I/O) | I: 0; O: 1 | 0 | 0 |
A15 (1)(3)
CD15 (1)(2) |
X | 1 | 1 |
PIN NAME (P3.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P3DIR.x | P3SEL1.x | P3SEL0.x | |||
P3.4/TB1.1/TB2CLK/SMCLK | 4 | P3.4 (I/O) (1) | I: 0; O: 1 | 0 | 0 |
TB1.CCI1B (1) | 0 | 0 | 1 | ||
TB1.1 (1) | 1 | ||||
TB2CLK (1) | 0 | 1 | 1 | ||
SMCLK (1) | 1 | ||||
P3.5/TB1.2/CDOUT | 5 | P3.5 (I/O) (1) | I: 0; O: 1 | 0 | 0 |
TB1.CCI2B (1) | 0 | 0 | 1 | ||
TB1.2 (1) | 1 | ||||
CDOUT (1) | 1 | 1 | 1 | ||
P3.6/TB2.1/TB1CLK | 6 | P3.6 (I/O) (1) | I: 0; O: 1 | 0 | 0 |
TB2.CCI1B (1) | 0 | 0 | 1 | ||
TB2.1 (1) | 1 | ||||
TB1CLK (1) | 0 | 1 | 1 |
PIN NAME (P4.x) | x | FUNCTION | CONTROL BITS/SIGNALS | ||
---|---|---|---|---|---|
P4DIR.x | P4SEL1.x | P4SEL0.x | |||
P4.1 | 1 | P4.1 (I/O) (1) | I: 0; O: 1 | 0 | 0 |
PIN NAME (PJ.x) | x | FUNCTION | CONTROL BITS/ SIGNALS (1) | ||
---|---|---|---|---|---|
PJDIR.x | PJSEL1.x | PJSEL0.x | |||
PJ.0/TDO/TB0OUTH/SMCLK/CD6 | 0 | PJ.0 (I/O) (2) | I: 0; O: 1 | 0 | 0 |
TDO (3) | X | X | X | ||
TB0OUTH | 0 | 0 | 1 | ||
SMCLK | 1 | ||||
CD6 | X | 1 | 1 | ||
PJ.1/TDI/TCLK/TB1OUTH/MCLK/CD7 | 1 | PJ.1 (I/O) (2) | I: 0; O: 1 | 0 | 0 |
TDI/TCLK (3)(4) | X | X | X | ||
TB1OUTH | 0 | 0 | 1 | ||
MCLK | 1 | ||||
CD7 | X | 1 | 1 | ||
PJ.2/TMS/TB2OUTH/ACLK/CD8 | 2 | PJ.2 (I/O) (2) | I: 0; O: 1 | 0 | 0 |
TMS (3)(4) | X | X | X | ||
TB2OUTH | 0 | 0 | 1 | ||
ACLK | 1 | ||||
CD8 | X | 1 | 1 | ||
PJ.3/TCK/CD9 | 3 | PJ.3 (I/O) (2) | I: 0; O: 1 | 0 | 0 |
TCK (3)(4) | X | X | X | ||
CD9 | X | 1 | 1 |
PIN NAME (P7.x) | x | FUNCTION | CONTROL BITS/SIGNALS (1) | |||||
---|---|---|---|---|---|---|---|---|
PJDIR.x | PJSEL1.5 | PJSEL0.5 | PJSEL1.4 | PJSEL0.4 | XT1 BYPASS | |||
PJ.4/XIN | 4 | PJ.4 (I/O) | I: 0; O: 1 | X | X | 0 | 0 | X |
XIN crystal mode (2) | X | X | X | 0 | 1 | 0 | ||
XIN bypass mode (2) | X | X | X | 0 | 1 | 1 | ||
PJ.5/XOUT | 5 | PJ.5 (I/O) | I: 0; O: 1 | 0 | 0 | 0 | 0 | X |
XOUT crystal mode (2) | X | X | X | 0 | 1 | 0 | ||
PJ.5 (I/O) (3) | I: 0; O: 1 | X | X | 0 | 1 | 1 |