JAJSHS5C August   2019  – August 2020 OPA862

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = ±2.5 V to ±5 V
    6. 6.6 Typical Characteristics: VS = ±5 V
    7. 6.7 Typical Characteristics: VS = ±2.5 V
    8. 6.8 Typical Characteristics: VS = 1.9 V, –1.4 V
    9. 6.9 Typical Characteristics: VS = 1.9 V, –1.4 V to ±5 V
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Anti-Phase Reversal Protection
      3. 7.3.3 Precision and Low Noise
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (±1.5 V to ±6.3 V)
      2. 7.4.2 Single-Supply Operation (3 V to 12.6 V)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single-Ended-to-Differential Gain of 4 V/V
    2. 8.2 Typical Applications
      1. 8.2.1 Single-Ended to Differential with 2.5-V Output Common-Mode Voltage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Transimpedance Amplifier Configuration
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 DC Level-Shifting
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.2 Detailed Design Procedure

In most TIA designs, selecting the right photodiode for the application is the most important decision because the photodiode determines the IIN and CD parameters that in turn determine the bandwidth required from the amplifier, the realizable TIA gain, and the signal bandwidth. Signal bandwidth also determines the rise time of the pulses. Choosing the photodiode with as low a capacitance as possible maximizes the TIA signal bandwidth for a given amplifier. Similarly, choosing a low TIA gain (RF) allows for higher signal bandwidth but having a RF as high as possible maximizes the SNR of the signal chain.

In order to take advantage of the increased SNR by using the OPA862 as described in Figure 8-5, the amplifier is already chosen. Using the design methodology explained at What You Need To Know About Transimpedance Amplifiers – Part 1 and the design parameters in Table 8-2, RF can be determined to be 1 kΩ and the required feedback capacitor, CF, is 22 pF. Because the range of IIN is 0 mA to 5 mA and RF is 1 kΩ, the range of a single-ended output voltage at VOUT+ is 0 V to 5 V (IIN × RF). In the cathode bias configuration of the photodiode condition in Figure 8-7, when the photodiode is excited the current flows towards VOUT+ through RF, resulting in a voltage pulse that goes lower from the zero current value. Thus, setting VOUT+ = 5 V and VOUT– = 0 V (VOD = +5 V) is desirable when the current is zero so that when the maximum current pulse of 5 mA occurs, VOUT+ goes to 0 V and VOUT– reaches 5 V (VOD = –5 V). The VOCM target of 2.5 V, which is a typical mid-reference voltage for differential input ADCs, can be set by choosing VREF = VOCM. The values of VDC and VREF can be determined by setting the values of VOUT+ and VOUT– to appropriate values at the zero photo-current in the following equations:

  • VDC = VOUT+
  • VREF = (VOUT– + VDC) / 2 = VOCM

Figure 8-8 and Figure 8-9 show the small-signal bandwidth and large-signal step response TINA simulation results of the circuit in Figure 8-7.

GUID-B53E3649-F4AF-4405-9B74-07AFA445201F-low.gifFigure 8-7 TIA Circuit With the OPA862