SCES603K August   2004  – October 2014 SN74AUP1G34

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplifed Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Function
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics, CL = 5 pF
    7. 7.7  Switching Characteristics, CL = 10 pF
    8. 7.8  Switching Characteristics, CL = 15 pF
    9. 7.9  Switching Characteristics, CL = 30 pF
    10. 7.10 Operating Characteristics
    11. 7.11 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Propagation Delays, Setup and Hold Times, and Pulse Width
    2. 8.2 Enable and Disable Times
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Available in the Ultra Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch
  • Low Static-Power Consumption;
    ICC = 0.9 μA Max
  • Low Dynamic-Power Consumption;
    Cpd = 4.1 pF Typ at 3.3 V
  • Low Input Capacitance; Ci = 1.5 pF Typ
  • Low Noise - Overshoot and Undershoot < 10% of VCC
  • Ioff Supports Live Insertion, Partial Power Down Mode, and Back Drive Protection
  • Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input
    (Vhys = 250 mV Typ at 3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode
    Signal Operation
  • tpd = 4.1 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

2 Applications

  • ATCA Solutions
  • Active Noise Cancellation (ANC)
  • Barcode Scanner
  • Blood Pressure Monitor
  • CPAP Machine
  • Cable Solutions
  • DLP 3D Machine Vision, Hyperspectral Imaging, Optical Networking, and Spectroscopy
  • E-Book
  • Embedded PC
  • Field Transmitter: Temperature or Pressure Sensor
  • Fingerprint Biometrics
  • HVAC: Heating, Ventilating, and Air Conditioning
  • Network-Attached Storage (NAS)
  • Server Motherboard and PSU
  • Software Defined Radio (SDR)
  • TV: High-Definition (HDTV), LCD, and Digital
  • Video Communications System
  • Wireless Data Access Card, Headset, Keyboard, Mouse, and LAN Card
  • X-ray: Baggage Scanner, Medical, and Dental

3 Description

This single buffer gate performs the Boolean function Y = A in positive logic.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74AUP1G34 SOT (5) 1.60 mm × 1.20 mm
USON (6) 1.45 mm × 1.00 mm
X2SON (4) 0.80 mm × 0.80 mm
DSBGA (4) 0.79 mm × 0.79 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

4 Simplifed Schematic

ld_ces603.gif