SCES553F may   2004  – July 2015 SN74AVC32T245

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: VCCA = 1.2 V
    7. 6.7  Switching Characteristics: VCCA = 1.5 V ± 0.1 V
    8. 6.8  Switching Characteristics: VCCA = 1.8 V ± 0.15 V
    9. 6.9  Switching Characteristics: VCCA = 2.5 V ± 0.2 V
    10. 6.10 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
    11. 6.11 Operating Characteristics
    12. 6.12 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2V to 3.6V Power-Supply Range
      2. 8.3.2 Partial-Power-Down Mode Operation
      3. 8.3.3 VCC Isolation
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 EnableTimes
    3. 9.3 Typical Application
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Input Voltage Ranges
        2. 9.3.2.2 Output Voltage Range
      3. 9.3.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Member of the Texas Instruments Widebus+™ Family
  • Control Inputs VIH/VIL Levels Referenced to VCCA Voltage
  • VCC Isolation Feature – If Either VCC Input is at GND, Both Ports are in the High-Impedance State
  • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.2 V to 3.6 V Power-Supply Range
  • Ioff Supports Partial-Power-Down Mode Operation
  • 4.6 V Tolerant I/Os
  • Max Data Rates
    • 380 Mbps (1.8 V to 3.3 V Level-Shifting)
    • 200 Mbps (< 1.8 V to 3.3 V Level-Shifting)
    • 200 Mbps (Translate to 2.5 V or 1.8 V)
    • 150 Mbps (Translate to 1.5 V)
    • 100 Mbps (Translate to 1.2 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000 V Human-Body Model (A114-A)
    • 200 V Machine Model (A115-A)
    • 1000 V Charged-Device Model (C101)

2 Applications

  • Personal Electronics
  • Industrial
  • Enterprise
  • Telecom

3 Description

This 32-bit noninverting bus transceiver uses two separate, configurable power-supply rails. The SN74AVC32T245 device is optimized to operate with VCCA/VCCB set from 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA and accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB and accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.

The SN74AVC32T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can disable the outputs so the buses are effectively isolated.

The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1OE, 2OE, 3OE, and 4OE) are supplied by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74AVC32T245 LFBGA (96) 13.50 mm × 5.50 mm
BGA MICROSTAR JUNIOR (96) 8.50 mm × 3.50 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram

SN74AVC32T245 LD_CES553.gif

4 Revision History

Changes from E Revision (August 2007) to F Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go