SCLS428I May   1999  – September  2015 SN74LV4051A

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Operating Characteristics
    7. 6.7  Switching Characteristics: VCC = 2.5 V ± 0.2 V
    8. 6.8  Switching Characteristics: VCC = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics: VCC = 5 V ± 0.5 V
    10. 6.10 Analog Switch Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
  • DB|16
  • NS|16
  • N|16
  • RGY|16
  • D|16
  • DGV|16
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

D, DB, DGB, N, NS, PW Package
16-Pin SOIC, SSOP, TVSOP, PDIP, SO, TSSOP
Top View
SN74LV4051A po1_cls428.gif
RGY Package
16-Pin VQFN With Exposed Thermal Pad
Top View
SN74LV4051A po2_cls428.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
A 11 I Selector line A for outputs (see Device Functional Modes for specific information)
B 10 I Selector line B for outputs (see Device Functional Modes for specific information)
C 9 I Selector line C for outputs (see Device Functional Modes for specific information)
COM 3 O/I(1) Output/Input of mux
GND 7, 8 — Ground
INH 6 I(1) Enables the outputs of the device. Logic low level with turn the outputs on, high level will turn them off.
Y0 13 I/O(1) Input/Output to mux
Y1 14 I/O(1) Input/Output to mux
Y2 15 I/O(1) Input/Output to mux
Y3 12 I/O(1) Input/Output to mux
Y4 1 I/O(1) Input/Output of mux
Y5 5 I/O(1) Input/Output to mux
Y6 2 I/O(1) Input/Output to mux
Y7 4 I/O(1) Input/Output to mux
VCC 16 — Device power
(1) These I/O descriptions represent the device when used as a multiplexer, when this device is operated as a demultiplexer pins Y0-Y7 may be considered outputs (O) and the COM pin may be considered inputs (I).