SCES351V July   2001  – April 2014 SN74LVC1G17

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Handling Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics—DC Limit Changes
    6. 7.6  Switching Characteristics, CL = 15 pF
    7. 7.7  Switching Characteristics AC Limit, -40°C TO 85°C
    8. 7.8  Switching Characteristics AC Limit, -40°C TO 125°C
    9. 7.9  Operating Characteristics
    10. 7.10 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DPW|5
  • DBV|5
  • DSF|6
  • DCK|5
  • YZV|4
  • DRL|5
  • YZP|5
  • DRY|6
サーマルパッド・メカニカル・データ
発注情報

9 Detailed Description

9.1 Overview

The SN74LVC1G17 device contains one Schmitt trigger buffer and performs the Boolean function Y = A. The device functions as an independent buffer, but because of Schmitt action, it will have different input threshold levels for a positive-going (VT+) and negative-going signals.

The DPW package technology is a major breakthrough in IC packaging. Its tiny 0.64 mm square footprint saves significant board space over other package options while still retaining the traditional manufacturing friendly lead pitch of 0.5 mm.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

9.2 Functional Block Diagram

ld_ces351.gif

9.3 Feature Description

  • Wide operating voltage range.
    • Operates From 1.65 V to 5.5 V.
  • Allows Down voltage translation.
  • Inputs accept voltages to 5.5 V.
  • Ioff feature allows voltages on the inputs and outputs, when VCC is 0 V.

9.4 Device Functional Modes

Table 1. Function Table

INPUT
A
OUTPUT
Y
H H
L L