JAJSIK7 February   2020 THP210

ADVANCE INFORMATION for pre-production products; subject to change without notice.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      高精度、低ノイズ、低消費電力の完全差動アンプのゲイン・ブロックとインターフェイス
      2.      小さな入力電圧オフセット
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Super-Beta Input Bipolar Transistors
      2. 7.3.2 Power Down
      3. 7.3.3 Flexible Gain Setting
      4. 7.3.4 Amplifier Overload Power Limit
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Driving Capacitive Loads
      2. 8.1.2 Operating the Power-Down Feature
      3. 8.1.3 Noise Performance
    2. 8.2 Typical Applications
      1. 8.2.1 An MFB Filter Driving an ADC Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at TA = 25°C, VVOCM = 0 V, RF = 2 kΩ, RL = 10 kΩ, VOUT = 2 VPP G = 1 V/V, and VPD = VS+ (unless otherwise noted)
THP210 D001-thp210-vos-histo-vs3.gif
VS = ±1.5 V
Figure 1. Input Offset Voltage Histogram
THP210 D004-thp210-vos-vs-vcm.gif
VS = ±18 V
Figure 3. Input Offset Voltage vs Input Common Mode Voltage
THP210 D022_vnoise.gif
Figure 5. Input-Referred Voltage Noise vs Frequency
THP210 D045_iq_vs_vs.gif
Figure 7. Quiescent Current vs Supply Voltage
THP210 D036_large_step_10V_ninv.gif
Figure 9. Large-Signal Step Response
THP210 D031-thp210-pos-ovdrec.gif
VS = ±15 V
Figure 11. Small-Signal Step Response
THP210 D010-thp210-offset-histogram-36v.gif
VS = ±18 V
Figure 2. Input Offset Voltage Histogram
THP210 D014-thp210-openloopphasegain.gif
Figure 4. Open-Loop Gain and Phase
THP210 D022-thp210-inoise-postive.gif
Figure 6. Current Noise vs Frequency
THP210 D046-thp210-iq-vs-temp.gif
Figure 8. Quiescent Current vs Temperature
THP210 D034-thp210-noninv-small-step.gif
Figure 10. Small-Signal Step Response