JAJSF71B April   2018  – December 2019 TLIN1024-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - IEC
    4. 6.4 Thermal Information
    5. 6.5 Recommended Operating Conditions
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Requirements
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  LIN (Local Interconnect Network) Bus
        1. 8.3.1.1 LIN Transmitter Characteristics
        2. 8.3.1.2 LIN Receiver Characteristics
          1. 8.3.1.2.1 Termination
      2. 8.3.2  TXD (Transmit Input/Output)
      3. 8.3.3  RXD (Receive Output)
      4. 8.3.4  VSUP1/2 (Supply Voltage)
      5. 8.3.5  GND (Ground)
      6. 8.3.6  EN (Enable Input)
      7. 8.3.7  Protection Features
      8. 8.3.8  TXD Dominant Time Out (DTO)
      9. 8.3.9  Bus Stuck Dominant System Fault: False Wake Up Lockout
      10. 8.3.10 Thermal Shutdown
      11. 8.3.11 Under Voltage on VSUP
      12. 8.3.12 Unpowered Device and LIN Bus
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Mode
      2. 8.4.2 Sleep Mode
      3. 8.4.3 Standby Mode
      4. 8.4.4 Wake Up Events
        1. 8.4.4.1 Wake Up Request (RXD)
        2. 8.4.4.2 Mode Transitions
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Normal Mode Application Note
        2. 9.2.2.2 Standby Mode Application Note
        3. 9.2.2.3 TXD Dominant State Timeout Application Note
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 サポート・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Power Supply
VSUP Operational supply voltage (ISO/DIS 17987 Param 10) Device is operational beyond the LIN defined nominal supply voltage range See Figure 8 and Figure 9 4 36 V
VSUP Nominal supply voltage (ISO/DIS 17987 Param 10): Normal Mode: Ramp VSUP while LIN signal is a 10 kHZ Square Wave with 50 % duty cycle and 18V swing. Normal and Standby Modes Normal Mode: Ramp VSUP while LIN signal is a 10 kHZ Square Wave with 50 % duty cycle and 18V swing. See Figure 8 and Figure 9 4 36 V
Sleep Mode 4 36 V
UVSUP Under voltage VSUP threshold 2.9 3.85 V
UVHYS Delta hysteresis voltage for VSUP under voltage threshold 0.2 V
ISUP Supply Current(1) Normal Mode: EN = High, bus dominant: total bus load where RLIN > 500 Ω and CLIN < 10 nF (See Figure 14) 3 15 mA
Standby Mode: EN = Low, bus dominant: total bus load where RLIN > 500 Ω and CLIN < 10 nF (See Figure 14) 2.2 8 mA
ISUP Supply Current(1) Normal Mode: EN = High, Bus Recessive: LIN = VSUP, 1 2 mA
Standby Mode: EN = Low, Bus Recessive: LIN = VSUP, 40 80 µA
Sleep Mode: 4.0 V < VSUP < 14 V, LIN = VSUP, EN = 0 V, TXD and RXD Floating   7 20 µA
Sleep Mode: 14 V < VSUP < 36 V, LIN = VSUP, EN = 0 V, TXD and RXD Floating 30 µA
RXD OUTPUT PIN (OPEN DRAIN)
VOL Output Low voltage Based upon External pull up to VCC 0.6 V
IOL Low level output current, open drain LIN = 0 V, RXD = 0.4 V 1.5 mA
IILG Leakage current, high-level LIN = VSUP, RXD = 5 V –5 0 5 µA
TXD INPUT PIN
VIL Low level input voltage –0.3 0.8 V
VIH High level input voltage 2 5.5 V
VIT Input threshold voltage, normal modes& selective wake modes 30 500 mV
IILG Low level input leakage current TXD = Low –5 0 5 µA
RTXD Interal pulldown resitor value 125 350 800
EN INPUT PIN
VIL Low level input voltage –0.3 0.8 V
VIH High level input voltage 2 5.5 V
VIT Hysteresis voltage By design and characterization 30 500 V
IILG Low level input current EN = Low -5 0 5 µA
REN Internal Pulldown resistor 125 350 800
LIN PIN
VOH High level output voltage LIN recessive, TXD = high, IO = 0 mA, VSUP = 7 V to 36 V 0.85     VSUP
LIN recessive, TXD = high, IO = 0 mA,  4 V ≤ VSUP < 7 V 3.0     V
VOL Low level output voltage LIN dominant, TXD = low, VSUP = 7 V to 36 V     0.2 VSUP
LIN dominant, TXD = low, 4 V ≤ VSUP < 7 V     1.2 V
VSUP_NON_OP VSUP where Impact of recessive LIN Bus < 5% (ISO/DIS 17987 Param 11) TXD& RXD open LIN = 4 V to 45 V -0.3 36 V
IBUS_LIM Limiting current (ISO/DIS 17987 Param 12) TXD = 0 V, VLIN = 18 V, RMEAS = 440 Ω, VSUP = 18 V, VBUSdom < 4.518 V See  Figure 13 40 90 200 mA
IBUS_PAS_dom Receiver leakage current, dominant (ISO/DIS 17987 Param 13) LIN = 0 V, VSUP = 18 V Driver off/recessive See Figure 14 -1 mA
IBUS_PAS_rec Receiver leakage current, recessive (ISO/DIS 17987 Param 14) LIN > VSUP, 4 V < VSUP < 36 V Driver off; See Figure 15 20 µA
IBUS_NO_GND Leakage current, loss of ground (ISO/DIS 17987 Param 15) GND = VSUP, 0 V ≤ VLIN ≤ 18 V, VSUP = 12 V; See Figure 16 -1 1 mA
IBUS_NO_BAT Leakage current, loss of supply (ISO/DIS 17987 Param 16) LIN = 36 V, VSUP = GND; See Figure 17 5 µA
VBUSdom Low level input voltage (ISO/DIS 17987 Param 17) LIN dominant (including LIN dominant for wake up) See Figure 11 and Figure 10 0.4 VSUP
VBUSrec High level input voltage (ISO/DIS 17987 Param 18) Lin recessive See Figure 11 and Figure 10 0.6 VSUP
VBUS_CNT Receiver center threshold (ISO/DIS 17987 Param 19) VBUS_CNT = (VIL + VIH)/2 See Figure 11 and Figure 10 0.475 0.5 0.525 VSUP
VHYS Hysteresis voltage (ISO/DIS 17987 Param 20) VHYS = (VIL - VIH) See Figure 11 and Figure 10 0.05 0.175 VSUP
VSERIAL_DIODE Serial diode LIN term pullup path (ISO/DIS 17987 Param 21) By design and characterization 0.4 0.7 1 V
RSLAVE Pullup resistor to VSUP (ISO/DIS 17987 Param 26) Normal and Standby modes 20 45  60
IRSLEEP Pullup current source to VSUP Sleep mode, VSUP = 14 V, LIN = GND -20 -2 µA
CLINPIN Capacitance of LIN pin    VSUP = 14 V 25 pF
Values are for each VSUP pin