SBOS561B March   2012  – December 2016 TLV3201 , TLV3202

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VCC = 5 V
    6. 7.6 Electrical Characteristics: VCC = 2.7 V
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Input Overvoltage Protection
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Comparator Inputs
      2. 9.1.2 External Hysteresis
        1. 9.1.2.1 Inverting Comparator with Hysteresis
        2. 9.1.2.2 Noninverting Comparator With Hysteresis
      3. 9.1.3 Capacitive Loads
    2. 9.2 Typical Applications
      1. 9.2.1 TLV3201 Configured as an AC-Coupled Comparator
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 TLV3201 and OPA320 Configured as a Fast-Response Output Current Monitor
      3. 9.2.3 TLV3201 and TMP20 Configured as a Precision Analog Temperature Switch
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 TINA-TI™ (Free Software Download)
        2. 12.1.1.2 Universal Op Amp EVM
        3. 12.1.1.3 TI Precision Designs
        4. 12.1.1.4 WEBENCH Filter Designer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resource
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage Supply voltage 7 V
Signal input pins(2) –0.5 (VCC) + 0.5
Current Signal input pins(2) –10 10 mA
Output short circuit(3) 100
Temperature Operating –55 125 °C
Junction, TJ 150
Storage, Tstg –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be current limited to 10 mA or less.
(3) Short-circuit to ground.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM),
per JEDEC specification JESD22-C101(2)		 TLV3201 ±2000
TLV3202 ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VS Supply voltage, VS = (VS+) – (VS–) 2.7 (±1.35) 5.5 (±2.75) V
Specified temperature –40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) TLV3201 TLV3202 UNIT
DBV
(SOT-23)		 DCK
(SC70)		 DGK
(VSSOP)		 D
(SOIC)
5 PINS 5 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 237.8 281.9 146.3 201.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 108.7 97.6 97.2 92.5 °C/W
RθJB Junction-to-board thermal resistance 64.1 68.3 84.2 123.3 °C/W
ψJT Junction-to-top characterization parameter 12.1 2.6 45.5 23 °C/W
ψJB Junction-to-board characterization parameter 63.3 67.3 83.7 212.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics: VCC = 5 V

at TA = 25°C and VCC = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VIO Input offset voltage VCM = VCC / 2 1 5 mV
TA = –40°C to 125°C 6
dVOS/dT Input offset voltage drift TA = –40°C to 125°C 1 10 µV/°C
PSRR Power-supply rejection ratio VCM = VCC / 2, VCC = 2.5 V to 5.5 V 65 85 dB
Input hysteresis 1.2 mV
INPUT BIAS CURRENT
IIB Input bias current VCM = VCC / 2 1 50 pA
TA = –40°C to 125°C 5 nA
IIO Input offset current VCM = VCC / 2 1 50 pA
TA = –40°C to 125°C 2.5 nA
INPUT VOLTAGE RANGE
VCM Common-mode voltage TA = –40°C to 125°C (VEE) – 0.2 (VCC) + 0.2 V
CMRR Common-mode rejection ratio –0.2 V < VCM < 5.2 V 60 70 dB
INPUT IMPEDANCE
Common mode 1013 || 2 Ω || pF
Differential 1013 || 4 Ω || pF
OUTPUT
VOL Voltage output swing from lower rail ISINK = 4 mA 175 190 mV
TA = –40°C to 125°C 225
VOH Voltage output swing from upper rail ISOURCE = 4 mA 120 140 mV
TA = –40°C to 125°C 170
ISC Short-circuit current (per comparator) ISC sinking 40 48 mA
TA = –40°C to 125°C See Figure 14
ISC sourcing 52 60
TA = –40°C to 125°C See Figure 14
POWER SUPPLY
VCC Specified voltage 2.7 5.5 V
IQ Quiescent current TA = 25°C 40 50 µA
TA = –40°C to 125°C 65

7.6 Electrical Characteristics: VCC = 2.7 V

at TA = 25°C and VCC = 2.7 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VIO Input offset voltage VCM = VCC / 2 1 5 mV
TA = –40°C to 125°C 6
dVOS/dT Input offset voltage drift TA = –40°C to 125°C 1 10 µV/°C
PSRR Power-supply rejection ratio VCM = VCC / 2, VCC = 2.5 V to 5.5 V 65 85 dB
Input hysteresis 1.2 mV
INPUT BIAS CURRENT
IIB Input bias current VCM = VCC / 2 1 50 pA
TA = –40°C to 125°C 5 nA
IIO Input offset current VCM = VCC / 2 1 50 pA
TA = –40°C to 125°C 2.5 nA
INPUT VOLTAGE RANGE
VCM Common-mode voltage TA = –40°C to 125°C (VEE) – 0.2 (VCC) + 0.2 V
CMRR Common-mode rejection ratio –0.2 V < VCM < 2.9 V 56 68 dB
INPUT IMPEDANCE
Common mode 1013 || 2 Ω || pF
Differential 1013 || 4 Ω || pF
OUTPUT
VOL Voltage output swing from lower rail ISINK = 4 mA 230 260 mV
TA = –40°C to 125°C 325
VOH Voltage output swing from upper rail ISOURCE = 4 mA 210 250 mV
TA = –40°C to 125°C 350
ISC Short-circuit current (per comparator) ISC sinking 13 19 mA
TA = –40°C to 125°C See Figure 14
ISC sourcing 15 21
TA = –40°C to 125°C See Figure 14
POWER SUPPLY
VCC Specified voltage 2.7 5.5 V
IQ Quiescent current TA = 25°C 36 46 µA
TA = –40°C to 125°C 60

7.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPD Propagation delay time Low to high Input overdrive = 20 mV, CL = 15 pF 47 50 ns
Input overdrive = 100 mV, CL = 15 pF 42 50
TA = –40°C to 125°C 55
High to low Input overdrive = 20 mV, CL = 15 pF 40 50
Input overdrive = 100 mV, CL = 15 pF 38 50
TA = –40°C to 125°C 55
Propagation delay skew Input overdrive = 20 mV, CL = 15 pF 2 ns
Propagation delay matching (TLV3202) High to low or low to high, input overdrive = 20 mV, CL = 15 pF 5 ns
tR Rise time 10% to 90% 4.8 ns
tF Fall time 10% to 90% 5.2 ns

7.8 Typical Characteristics

at TA = 25°C, VCC = 5 V, and input overdrive (VOD) = 20 mV (unless otherwise noted)
TLV3201 TLV3202 Offset Distribution.png
Figure 1. Offset Voltage Distribution
TLV3201 TLV3202 Offset vs temperature.png
Figure 3. Offset Voltage vs Temperature
TLV3201 TLV3202 Offset vs CMcfg 5_5.png
Figure 5. Offset Voltage vs Common-Mode Voltage
TLV3201 TLV3202 CMRR-PSRR vs Temp.png
Figure 7. Common-Mode Rejection Ratio and
Power-Supply Rejection Ratio vs Temperature
TLV3201 TLV3202 IB vs CM 2p5.png
Figure 9. Input Bias Current and Input Offset Current
vs Common-Mode Input Voltage
TLV3201 TLV3202 IQ Distribution.png
Figure 11. Quiescent Current Distribution
TLV3201 TLV3202 IQ vs Fswitch.png
Figure 13. Quiescent Current vs Switching Frequency
TLV3201 TLV3202 IOUT vs Vout 2p7.png
Figure 15. Output Voltage vs Output Current
TLV3201 TLV3202 Prop Delay HL.png
Figure 17. Propagation Delay Falling Edge
TLV3201 TLV3202 tc_3_input_overdrive_vs_prop_delay_bos561.png
Figure 19. Propagation Delay vs Input Overdrive
TLV3201 TLV3202 Prop vs VCM 2p7.png
Figure 21. Propagation Delay vs Common-Mode Voltage
TLV3201 TLV3202 tc_5_supply voltage_vs_prop_delay_bos561.png
Figure 23. Propagation Delay vs Supply Voltage
TLV3201 TLV3202 Hysteresis Distribution.png
Figure 2. Hysteresis Distribution
TLV3201 TLV3202 Offset vs CMcfg.png
Figure 4. Offset Voltage vs Common-Mode Voltage
TLV3201 TLV3202 Offset vs PS.png
Figure 6. Offset Voltage vs Power Supply
TLV3201 TLV3202 Bias Current vs temperature vs supply.png
Figure 8. Input Bias Current and Input Offset Current
vs Temperature
TLV3201 TLV3202 IB vs CM 5p5.png
Figure 10. Input Bias Current and Input Offset Current
vs Common-Mode Input Voltage
TLV3201 TLV3202 IQ vs Supply.png
Figure 12. Quiescent Current vs Supply Voltage
TLV3201 TLV3202 Isc vs Temperature.png
Figure 14. Short-Circuit Current vs Temperature
TLV3201 TLV3202 IOUT vs Vout 5p5.png
Figure 16. Output Voltage vs Output Current
TLV3201 TLV3202 Prop Delay LH.png
Figure 18. Propagation Delay Rising Edge
TLV3201 TLV3202 Prop vs Temperature.png
Figure 20. Propagation Delay vs Temperature
TLV3201 TLV3202 Prop vs VCM 5p5.png
Figure 22. Propagation Delay vs Common-Mode Voltage
TLV3201 TLV3202 cap load_vs_prop_delay.png
Figure 24. Propagation Delay vs Capacitive Load