JAJSGD8B October   2018  – Sept 2019 TMUX1574

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      アプリケーションの例
      2.      ブロック図
  4. 4 改訂履歴
  5. 5 概要 (続き)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dynamic Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
      1. 7.8.1 Eye Diagrams
  8. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  IPOFF Leakage Current
    5. 8.5  Transition Time
    6. 8.6  tON (EN) and tOFF (EN) Time
    7. 8.7  tON (VDD) and tOFF (VDD) Time
    8. 8.8  Break-Before-Make Delay
    9. 8.9  Propagation Delay
    10. 8.10 Skew
    11. 8.11 Charge Injection
    12. 8.12 Capacitance
    13. 8.13 Off Isolation
    14. 8.14 Channel-to-Channel Crosstalk
    15. 8.15 Bandwidth
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Beyond Supply Operation
      3. 9.3.3 1.8 V Logic Compatible Inputs
      4. 9.3.4 Powered-off Protection
      5. 9.3.5 Fail-Safe Logic
      6. 9.3.6 Low Capacitance
      7. 9.3.7 Integrated Pull-Down Resistors
    4. 9.4 Device Functional Modes
    5. 9.5 Truth Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 ドキュメントのサポート
      1. 13.1.1 関連資料
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.7 Timing Requirements

VDD = 1.5 V to 5.5 V, GND = 0V, TA = –40°C to +125°C
Typical values are at VDD = 3.3 V, TA = 25°C, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN NOM MAX UNIT
tTRAN Transition time from control input  VDD = 2.5 V to 5.5 V
VS = VDD
RL = 200 Ω, CL = 15pF
Refer to Transition Timing Figure 		160 350 ns
tTRAN Transition time from control input  VDD < 2.5 V
VS = VDD
RL = 200 Ω, CL = 15pF
Refer to Transition Timing Figure 		180 580 ns
tON(EN) Device turn on time from enable pin VS = VDD
RL = 200 Ω, CL = 15pF
Refer to Ton(EN) & Toff(EN) Figure 		12 35 µs
tOFF(EN) Device turn off time from enable pin VS = VDD
RL = 200 Ω, CL = 15pF
Refer to Ton(EN) & Toff(EN) Figure 		50 95 ns
tON(VDD) Device turn on time (VDD to output) VS = 3.6 V
VDD rise time = 1us
RL = 200 Ω, CL = 15pF
Refer to Ton(vdd) & Toff(vdd) Figure 		20 60 µs
tOFF(VDD) Device turn off time (VDD to output) VS = 3.6 V
VDD fall time = 1us
RL = 200 Ω, CL = 15pF
Refer to Ton(vdd) & Toff(vdd) Figure 		1.2 2.7 µs
tOPEN (BBM) Break before make time VS = 1 V
RL = 200 Ω, CL = 15pF
Refer to Topen(BBM) Figure 		0.5 ns
tSK(P) Inter - channel skew - QFN (RSV) Refer to Tsk Figure 5 ps
tSK(P) Inter - channel skew - DYY (SOT-23) Refer to Tsk Figure 10 ps
tSK(P) Inter - channel skew - TSSOP (PW) Refer to Tsk Figure 18 ps
tPD Propagation delay - QFN (RSV) Refer to Tpd Figure 50 ps
tPD Propagation delay - DYY (SOT-23) Refer to Tpd Figure 70 ps
tPD Propagation delay - TSSOP (PW) Refer to Tpd Figure 95 ps