SLVSBQ9D December   2012  – April 2017 TPD4E1U06

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings—IEC Specification
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 IEC 61000-4-2 Level 4 ESD Protection
      2. 7.3.2 IEC 61000-4-5 Surge Protection
      3. 7.3.3 IEC 61000-4-4 EFT Protection
      4. 7.3.4 IO Capacitance
      5. 7.3.5 DC Breakdown Voltage
      6. 7.3.6 Ultra Low Leakage Current
      7. 7.3.7 Low ESD Clamping Voltage
      8. 7.3.8 Industrial Temperature Range
      9. 7.3.9 Small, Easy-to-Route Packages
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range on Pins 1, 3, 4, or 6
        2. 8.2.2.2 Operating Frequency
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPD4E1U06 is a TVS diode array which is typically used to provide a path to ground for dissipating ESD events on hi-speed signal lines between a human interface connector and a system. As the current from ESD passes through the TVS, only a small voltage drop is present across the diode. This is the voltage presented to the protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a safe level for the protected IC.

8.2 Typical Application

For this design example, one TPD4E1U06 device is being used in a dual USB 2.0 application. This provides a complete port protection scheme.

TPD4E1U06 app_LVSBQ9.gif Figure 10. Dual USB 2.0 Application

8.2.1 Design Requirements

Given the USB 2.0 application, the parameters in Table 1 are known.

Table 1. Design Parameters

DESIGN PARAMETER VALUE
Signal range on pins 1, 3, 4, or 6 0 V to 5 V
Operating frequency 240 MHz

8.2.2 Detailed Design Procedure

8.2.2.1 Signal Range on Pins 1, 3, 4, or 6

The TPD4E1U06 has 4 identical protection channels for signal lines. The symmetry of the device provides flexibility when selecting which of the 4 I/O channels protect which signal lines. Any I/O supports a signal range of 0 to 5.5 V.

8.2.2.2 Operating Frequency

The TPD4E1U06 has a capacitance of 0.8 pF (typical), supporting USB 2.0 data rates.

8.2.3 Application Curve

TPD4E1U06 C009_SLVSBQ9.png Figure 11. Insertion Loss Graph