SLVSBV3B April 2013 – November 2016 TPS56528
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
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メカニカル・データ（パッケージ｜ピン）
- DDA|8
サーマルパッド・メカニカル・データ
- DDA|8
発注情報
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS56528 is a 4.5-V to 18-V input step-down DC-DC converter with an output voltage adjustable from 0.6 V to 7 V and capable of output currents up to 5 A.
8.2 Typical Application
Figure 10. Typical Application Schematic
8.2.1 Design Requirements
Table 1 lists the design parameters for this application example.
Table 1. Design Parameters
| PARAMETER | VALUE |
|---|---|
| Input voltage range, VIN | 4.5 to 18 V |
| Output voltage, VOUT | 1.05 V |
| Output current, IOUT | 5 A |
| Switching Frequency | 650 KHz |
| Output voltage ripple, VOUT ripple | < 20 mV |
| Input voltage ripple, VIN ripple | < 100 mV |
8.2.2 Detailed Design Procedure
8.2.2.1 Output Voltage Resistors Selection
The output voltage is set with a resistor divider from the output node to the VFB pin. TI recommends using 1% tolerance or better divider resistors. Start by using Equation 2 to calculate VOUT.
To improve efficiency at light loads, consider using larger value resistors, high resistance is more susceptible to noise, and the voltage errors from the VFB input current are more noticeable.
8.2.2.2 Output Filter Selection
The output filter used with the TPS56528 is an LC circuit. This LC filter has double pole in Equation 3.
At low frequencies, the overall loop gain is set by the output setpoint resistor divider network and the internal gain of the TPS56528. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 3 is located below the high frequency zero but close enough that the phase boost provided by the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement, use the values recommended in Table 2.
Table 2. Recommended Component Values
| OUTPUT VOLTAGE (V) |
R1 (kΩ) | R2 (kΩ) | C4 (pF)(1) | L1 (µH) | C7 + C8 (µF) | ||||
|---|---|---|---|---|---|---|---|---|---|
| MIN | TYP | MAX | MIN | TYP | MAX | ||||
| 1 | 33.2 | 49.9 | 5 | 33 | 100 | 1 | 1.5 | 4.7 | 20 to 68 |
| 1.05 | 37.4 | 49.9 | 5 | 33 | 100 | 1 | 1.5 | 4.7 | 20 to 68 |
| 1.2 | 49.9 | 49.9 | 5 | 22 | 47 | 1 | 1.5 | 4.7 | 20 to 68 |
| 1.5 | 75.0 | 49.9 | 5 | 15 | 33 | 1 | 1.5 | 4.7 | 20 to 68 |
| 1.8 | 100 | 49.9 | 5 | 10 | 22 | 1 | 1.5 | 4.7 | 20 to 68 |
| 2.5 | 158 | 49.9 | 5 | 10 | 22 | 1.5 | 2.2 | 4.7 | 20 to 68 |
| 3.3 | 226 | 49.9 | 2 | 5 | 15 | 1.5 | 2.2 | 4.7 | 20 to 68 |
| 5 | 365 | 49.9 | 2 | 5 | 10 | 2.2 | 3.3 | 4.7 | 20 to 68 |
| 6.5 | 487 | 49.9 | 2 | 2 | 10 | 2.2 | 3.3 | 4.7 | 20 to 68 |
For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed-forward capacitor (C4) in parallel with R1
The inductor peak-to-peak ripple current, peak current, and RMS current are calculated using Equation 4, Equation 5, and Equation 6. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current. Use 650 kHz for fSW.
Ensure the chosen inductor is rated for the peak current of Equation 5 and the RMS current of Equation 6.
For this design example, the calculated peak current is 5.51 A and the calculated RMS current is 5.01 A.
The inductor used is a TDK SPM6530-1R5M100 with a peak current rating of 11.5 A and an RMS current rating of 11 A.
The capacitor value and ESR determines the amount of output voltage ripple. The TPS56528 is intended for use with ceramic or other low-ESR capacitors. Recommended values range from 20 µF to 68 µF. Use Equation 7 to determine the required RMS current rating for the output capacitor.
For this design, two TDK C3216X5R0J226M 22-µF output capacitors are used. The typical ESR is 2 mΩ each. The calculated RMS current is 0.284 A and each output capacitor is rated for 4 A.
8.2.2.3 Input Capacitor Selection
The TPS56528 requires an input decoupling capacitor and a bulk capacitor is required depending on the application. A ceramic capacitor over 10 μF is recommended for the decoupling capacitor. An additional 0.1-µF capacitor (C3) from pin 8 to ground is optional to provide additional high frequency filtering. The capacitor voltage rating requires greater than the maximum input voltage.
8.2.2.4 Bootstrap Capacitor Selection
A 0.1-µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. TI recommends using a ceramic capacitor.
8.2.2.5 VREG5 Capacitor Selection
A 0.47-µF ceramic capacitor must be connected between the VREG5 to GND pin for proper operation. TI recommends using a ceramic capacitor.
8.2.3 Application Curves
