SLVSAD5A July   2010  – August 2015 TPS62120 , TPS62122

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout
      2. 8.3.2 Enable and Shutdown
      3. 8.3.3 Power Good Output
      4. 8.3.4 SGND Open-Drain Output
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft Start
      2. 8.4.2 Main Control Loop
      3. 8.4.3 100% Duty Cycle Low-Dropout Operation
      4. 8.4.4 Short-Circuit Protection
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS62120 With Open-Drain Output
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Output Voltage Setting
          2. 9.2.1.2.2 Output Filter Design (Inductor and Output Capacitor)
          3. 9.2.1.2.3 Inductor Selection
          4. 9.2.1.2.4 Output Capacitor Selection
          5. 9.2.1.2.5 Input Capacitor Selection
          6. 9.2.1.2.6 Checking Loop Stability
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Standard Circuit for TPS62122
    3. 9.3 System Examples
      1. 9.3.1 TPS62120 1.8-V Output Voltage Configuration
      2. 9.3.2 TPS62120 3.06-V Output Voltage Configuration
      3. 9.3.3 TPS62122 2.0-V Output Voltage Configuration
      4. 9.3.4 TPS62120 1.8-V VOUT Configuration Powered From a High-Impedance Source
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

DRV Package
6-Pin SON
Top View
TPS62120 TPS62122 po6_lvsad5.gif
DCN Package
8-Pin SOT-23
Top View
TPS62120 TPS62122 po8_lvsad5.gif

Pin Functions

PIN I/O DESCRIPTION
NAME DFN SOT-23
EN 4 3 I Pulling this pin to high activates the device. Low level shuts it down. This pin must be terminated.
FB 3 5 I This is the feedback pin for the regulator. Connect external resistor-divider to this pin.
GND 6 2 PWR GND supply pin.
PG — 6 O This pin is available in TPS62120 only.
Open-drain power good output. Connect this terminal through a pullup resistor to a voltage rail up to 5.5 V or leave it open. This pin can sink 500 µA.
SGND — 4 I This pin is available in TPS62120 only.
Open-drain output which is turned on during shutdown mode (EN = 0) or VIN is below the UVLO threshold. The output connects the SGND pin to GND through an internal MOSFET with typical 370-Ω RDS(ON). When the device is enabled (EN = 1), this output is high impedance. To discharge the output capacitor during shutdown mode, connect this pin to VOUT (output capacitor) or leave it open.
SW 1 7 O This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this terminal. Do not tie this pin to VIN, VOUT or GND.
VIN 5 1 PWR VIN power supply pin.
VOUT 2 8 I This pin must be connected to the output capacitor.
— Exposed Thermal Pad — — Exposed thermal pad available only in DRV package option. This pad must be connected to GND.