SLVSC70A January 2015 – January 2015 TPS652511 , TPS652512 , TPS652513
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The device is triple synchronous step down dc/dc converter. It is typically used to convert a higher dc voltage to lower dc voltages with continuous available output current of 3 A/2 A/2 A. The following design procedure can be used to select component values for the TPS65251x.
DESIGN PARAMETERS  VALUE 

Output voltage  1.2 V 
Transient response 0.5A to 2A load step  120 mV 
Maximum output current  3 A 
Input voltage  12 V nom, 9.6 to 14.4 V 
Output voltage ripple  <30 mV pp 
Switching frequency  500 kHz 
A typical compensation circuit could be type II (R_{c} and C_{c}) to have a phase margin between 60° and 90°, or type III (R_{c}, C_{c} and C_{ff}) to improve the converter transient response. C_{Roll} adds a high frequency pole to attenuate highfrequency noise when needed. It may also prevent noise coupling from other rails if there is possibility of cross coupling in between rails when layout is very compact.
To calculate the external compensation components use Table 1:
TYPE II CIRCUIT  TYPE III CIRCUIT  

Select switching frequency that is appropriate for application depending on L, C sizes, output ripple, EMI concerns and etc. Switching frequencies between 500 kHz and 1 MHz give best trade off between performance and cost. When using smaller L and Cs, switching frequency can be increased. To optimize efficiency, switching frequency can be lowered.  Type III circuit recommended for switching frequencies higher than 500 kHz.  
Select cross over frequency (fc) to be less than 1/5 to 1/10 of switching frequency.  Suggested fc = fs/10 
Suggested fc = fs/10 
Set and calculate R_{c}. 
Equation 6.

Equation 7.

Calculate C_{c} by placing a compensation zero at or before the converter dominant pole Equation 8.

Equation 9.

Equation 10.

Add C_{Roll} if needed to remove large signal coupling to high impedance COMP node. Make sure that Equation 11. is at least twice the cross over frequency. 
Equation 12.

Equation 13.

Calculate C_{ff} compensation zero at low frequency to boost the phase margin at the crossover frequency. Make sure that the zero frequency (fz_{ff} is smaller than softstart equivalent frequency (1/T_{ss}).  NA 
Equation 14.

The first step is to decide on a switching frequency for the regulator. Typically, you will want to choose the highest switching frequency possible since this will produce the smallest solution size. The high switching frequency allows for lower valued inductors and smaller output capacitors compared to a power supply that switches at a lower frequency. However, the highest switching frequency causes extra switching losses, which hurt the converter’s performance. The converter is capable of running from 300 kHz to 2.2 MHz. Unless a small solution size is an ultimate goal, a moderate switching frequency of 500 kHz is selected to achieve both a small solution size and a high efficiency operation. Using Figure 19, R1 is determined to be 383 kΩ
To calculate the value of the output inductor, use Equation 15. KIND is a coefficient that represents the amount of inductor ripple current relative to the maximum output current. In general, KIND is normally from 0.1 to 0.3 for the majority of applications.
For this design example, use KIND = 0.2 and the inductor value is calculated to be 3.6 µH. For this design, a nearest standard value was chosen: 4.7 µH. For the output filter inductor, it is important that the RMS current and saturation current ratings not be exceeded. The RMS and peak inductor current can be found from Equation 16 and Equation 17.
There are two primary considerations for selecting the value of the output capacitor. The output capacitors are selected to meet load transient and output ripple’s requirements.
Equation 19 gives the minimum output capacitance to meet the transient specification. For this example,
L_{O} = 4.7 µH, ΔI_{OUT} = 1.5 A – 0.75 A = 0.75 A and ΔV_{OUT} = 120 mV. Using these numbers gives a minimum capacitance of 18 µF. A standard 22µF ceramic capacitor is chose in the design.
Equation 20 calculates the minimum output capacitance needed to meet the output voltage ripple specification. Where fsw is the switching frequency, V_{RIPPLE} is the maximum allowable output voltage ripple, and I_{RIPPLE} is the inductor ripple current. In this case, the maximum output voltage ripple is 30 mV. From Equation 16, the output current ripple is 0.46 A. From Equation 20, the minimum output capacitance meeting the output voltage ripple requirement is 1.74 µF.
Additional capacitance derating for aging, temperature and DC bias should influence this minimum value. For this example, one 22µF, 6.3V X7R ceramic capacitor with 3 mΩ of ESR will be used.
A minimum 10µF X7R/X5R ceramic input capacitor is recommended to be added between VIN and GND. These capacitors should be connected as close as physically possible to the input pins of the converters as they handle the RMS ripple current shown in Equation 21. For this example, I_{OUT} = 3 A, V_{OUT} = 1.2 V, V_{INmin} = 9.6 V, from Equation 21, the input capacitors must support a ripple current of 0.99 A RMS.
The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 22. Using the design example values, I_{OUTmax} = 3 A, C_{IN} = 10 µF, f_{SW} = 500 kHz, yields an input voltage ripple of 150 mV.
The softstart capacitor determines the minimum amount of time it will take for the output voltage to reach its nominal programmed value during powerup. This is useful if the output capacitance is very large and would require large amounts of current to quickly charge the capacitor to the output voltage level.
The softstart capacitor value can be calculated using Equation 23. In this example, the converter’s softstart time is 0.8 ms. In TPS65251x, Iss is 5 µA and Vref is 0.8 V. From Equation 23, the softstart capacitance is 5 nF. A standard 4.7nF ceramic capacitor is chosen in this design. In this example, C16 is 4.7 nF
A 0.047µF ceramic capacitor must be connected between the BST to LX pin for proper operation. It is recommended to use a ceramic capacitor with X5R or better grade dielectric. The capacitor should have 10V or higher voltage rating.
The converter uses the voltage drop on the highside MOSFET to measure the inductor current. The overcurrent protection threshold can be optimized by changing the trip resistor. Figure 6 governs the threshold of overcurrent protection for Buck 1. When selecting a resistor, do not exceed the graph limits. In this example, the over current threshold is 3.2 A. In order to prevent a premature limit trip, the minimum line is used and the resistor is 86.6 kΩ.
When setting highside current limit to large current values, ensure that the additional load immediately prior to an overcurrent condition will not cause the switching node voltage to exceed 20 V. Additionally, ensure during worst case operation, with all bucks loaded immediately prior to current limit, the maximum virtual junction temperature of the device does not exceed 125°C.
For the example design, 40.2 kΩ was selected for R10. Vout is 1.2 V, Vref = 0.8 V. Using Equation 24, R11 is calculated as 80.4 kΩ. A standard 80.6kΩ resistor is chose in this design.
A typeII compensation circuit is adequate for the converter to have a phase margin between 60 and 90 degrees. The following equations show the procedure of designing a peak current mode control dc/dc converter.
The compensation design takes the following steps:
From the procedures above, the compensation network includes a 20kΩ resistor (R12) and a 4700pF capacitor (C14).
The following ceramic capacitor (X7R/X5R) should be connected as close as possible to the described pins:
Ch1 = V_{OUT}  Ch2 = COMP1  Ch3 = I_{OUT} 
Ch4 = Inductor 
Ch1 = V_{OUT}  Ch3 = I_{OUT}  Ch4 = Inductor 
Ch3 = V_{IN}  
Ch1 = V_{OUT}  Ch3 = I_{OUT}  Ch4 = Inductor 
Ch3 = V_{IN}  
Ch1 = V_{OUT}  Ch3 = I_{OUT}  Ch4 = Inductor 
Ch1 = V_{OUT}  Ch2 = COMP1  Ch3 = I_{OUT} 
Ch4 = Inductor 
Ch1 = V_{OUT}  Ch3 = I_{OUT}  Ch4 = Inductor 
Ch1 = V_{OUT}  Ch3 = I_{OUT}  Ch4 = Inductor 
Ch1 = V_{OUT}  Ch2 = COMP1  Ch3 = I_{OUT} 
Ch4 = Inductor 
Ch1 = V_{OUT}  Ch3 = I_{OUT}  Ch4 = Inductor 
Ch1 = V_{OUT}  Ch2 = COMP1  Ch3 = I_{OUT} 
Ch4 = Inductor 