SGLS303F May   2005  – April 2016 TPS732-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Transient Response
      5. 7.3.5 Reverse Current
      6. 7.3.6 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Output Noise
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
    4. 10.4 Package Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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7 Detailed Description

7.1 Overview

The TPS732-Q1 low-dropout linear regulator devices operate with an input voltage down to 1.7 V and support output voltages down to 1.2 V while sourcing up to 500 mA of load current. These linear regulators use an NMOS pass element with an integrated 4-MHz charge pump to provide a dropout voltage of less than 250 mV at full load current. This unique architecture also permits stable regulation over a wide range of output capacitors. In fact, the TPS732-Q1 family of devices does not require any output capacitor for stability. The increased insensitivity to the output capacitor value and type makes this family of linear regulators an ideal choice when powering a load where the effective capacitance is unknown. The TPS732-Q1 family of devices also features a noise reduction (NR) pin that allows for additional reduction of the output noise. The low noise output featured by the TPS732-Q1 family makes the device well-suited for powering VCOs or any other noise-sensitive load.

7.2 Functional Block Diagram

TPS732-Q1 bd_gls303.gif
Fixed voltage version.

7.3 Feature Description

7.3.1 Internal Current Limit

The TPS732-Q1 internal current limit helps protect the regulator during fault conditions. Foldback helps to protect the regulator from damage during output short-circuit conditions by reducing current limit when VOUT drops below 0.5 V. See Figure 9.

7.3.2 Shutdown

The enable pin is active high and is compatible with standard TTL-CMOS levels. VEN below 0.5 V (maximum) turns the regulator off and drops the ground pin current to approximately 10 nA. When shutdown capability is not required, the Enable pin can be connected to VIN. When a pullup resistor is used, and operation down to 1.8 V is required, use pullup resistor values below 50 kΩ.

7.3.3 Dropout Voltage

The TPS732-Q1 family of devices uses an NMOS pass transistor to achieve extremely low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the NMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS-ON of the NMOS pass element.

For large step changes in load current, the TPS732-Q1 family of devices requires a larger voltage drop from VIN to VOUT to avoid degraded transient response. The boundary of this transient dropout region is approximately twice the dc dropout. Values of VIN – VOUT above this line ensure normal transient response.

Operating in the transient dropout region can cause an increase in recovery time. The time required to recover from a load transient is a function of the magnitude of the change in load current rate, the rate of change in load current, and the available headroom (VIN to VOUT voltage drop). Under worst-case conditions [full-scale instantaneous load change with (VIN – VOUT) close to dc dropout levels], the TPS732-Q1 family of devices can take a couple of hundred microseconds to return to the specified regulation accuracy.

7.3.4 Transient Response

The low open-loop output impedance provided by the NMOS pass element in a voltage follower configuration allows operation without an output capacitor for many applications. As with any regulator, the addition of a capacitor (nominal value 1 μF) from the output pin to ground will reduce undershoot magnitude but increase duration. In the adjustable version, the addition of a capacitor, CFB, from the output to the adjust pin will also improve the transient response.

The TPS732-Q1 family of devices does not have active pulldown when the output is over-voltage. This allows applications that connect higher voltage sources, such as alternate power supplies, to the output. This also results in an output overshoot of several percent if the load current quickly drops to zero when a capacitor is connected to the output. The duration of overshoot can be reduced by adding a load resistor. The overshoot decays at a rate determined by output capacitor COUT and the internal and external load resistance. The rate of decay is given by Equation 1 and Equation 2:

(Fixed voltage version)

Equation 1. TPS732-Q1 Q4_gls303.gif

(Adjustable voltage version)

Equation 2. TPS732-Q1 Q5_gls303.gif

7.3.5 Reverse Current

The NMOS pass element of the TPS732-Q1 family of devices provides inherent protection against current flow from the output of the regulator to the input when the gate of the pass device is pulled low. To ensure that all charge is removed from the gate of the pass element, the enable pin must be driven low before the input voltage is removed. If this is not done, the pass element may be left on due to stored charge on the gate.

After the enable pin is driven low, no bias voltage is needed on any pin for reverse current blocking. Note that reverse current is specified as the current flowing out of the IN pin due to voltage applied on the OUT pin. There will be additional current flowing into the OUT pin due to the 80-kΩ internal resistor divider to ground (see the Functional Block Diagram and Figure 31).

For the TPS73201-Q1, reverse current may flow when VFB is more than 1 V above VIN.

7.3.6 Thermal Protection

Thermal protection disables the output when the junction temperature rises to approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C, the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This limits the dissipation of the regulator, protecting it from damage due to overheating.

Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to 125°C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least 35°C above the maximum expected ambient condition of your application. This produces a worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.

The internal protection circuitry of the TPS732-Q1 family of devices has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS732-Q1 family of devices into thermal shutdown will degrade device reliability.

7.4 Device Functional Modes

7.4.1 Normal Operation

The TPS632-Q1 family of devices require an input voltage of at least 1.7 V to function properly and attempt to maintain regulation.

When operating the device near 5.5 V, take care to suppress any transient spikes that may exceed the 6-V absolute maximum voltage rating. The device must never operate at a DC voltage greater than 5.5 V.