SLVS208J May   1999  – August 2015 TPS767

PRODUCTION DATA.  

  1. Features
  2. Description
  3. Revision History
  4. Description (Continued)
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 FB—Pin Connection (adjustable version only)
      2. 9.3.2 Reset Indicator
      3. 9.3.3 Regulator Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Minimum Load Requirements
    5. 9.5 Programming
      1. 9.5.1 Programming the TPS76701 Adjustable LDO Regulator
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 External Capacitor Requirements
    2. 10.2 Typical Application
  11. 11Layout
    1. 11.1 Power Dissipation and Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|8
  • PWP|20
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • 1 A Low-Dropout Voltage Regulator
  • Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, 5.0-V Fixed Output and Adjustable Versions
  • Dropout Voltage Down to 230 mV at 1 A (TPS76750)
  • Ultralow 85 µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • Open Drain Power-On Reset With 200-ms Delay (See TPS768xx for PG Option)
  • 8-Pin SOIC and 20-Pin TSSOP PowerPAD™ (PWP) Package
  • Thermal Shutdown Protection

2 Description

This device is designed to have a fast transient response and be stable with 10 µF low ESR capacitors. This combination provides high performance at a reasonable cost.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically
230 mV at an output current of 1 A for the TPS76750) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically
85 µA over the full range of output current, 0 mA to
1 A). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS767xx SOIC (8) 4.90 mm × 3.91 mm
HTSSOP (20) 6.50 mm x 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

TPS76733 Dropout Voltage vs Free-air Temperature

TPS767 grph_d_vltg_f_air_temp_slvs208.gif

TPS76733 Load Transient Response

TPS767 grph_load_trans_resp_slvs208.gif

3 Revision History

Changes from I Revision (January 2004) to J Revision

  • Added ESD Ratings table, Overview section, Feature Description section, Device Functional Modes, Application and Implementation section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. Go