JAJSET0B December   2018  – October 2019 TPS7A26

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      代表的なアプリケーション回路
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Enable
      2. 8.3.2 Dropout Voltage
      3. 8.3.3 Current Limit
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Thermal Shutdown
      6. 8.3.6 Power Good
      7. 8.3.7 Active Overshoot Pulldown Circuitry
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Functional Mode Comparison
      2. 8.4.2 Normal Operation
      3. 8.4.3 Dropout Operation
      4. 8.4.4 Disabled
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Adjustable Device Feedback Resistors
      2. 9.1.2 Recommended Capacitor Types
      3. 9.1.3 Input and Output Capacitor Requirements
      4. 9.1.4 Reverse Current
      5. 9.1.5 Feed-Forward Capacitor (CFF)
      6. 9.1.6 Power Dissipation (PD)
      7. 9.1.7 Estimating Junction Temperature
      8. 9.1.8 Special Consideration for Line Transient
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Transient Response
        2. 9.2.2.2 Selecting Feedback Divider Resistors
        3. 9.2.2.3 Thermal Dissipation
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デバイスの項目表記
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DRV|6
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

specified at TJ = –40°C to +125°C, VIN = VOUT(nom) + 0.8 V or VIN = 2.4 V (whichever is greater), FB tied to OUT, IOUT = 1 mA, VEN = 2 V, and CIN = 1 μF, COUT = 2.2 μF (unless otherwise noted); typical values are at TJ = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VUVLO(RISING) UVLO threshold rising VIN rising 1.95 2.15 2.35 V
VUVLO(HYS) UVLO hysteresis 70 mV
VUVLO(FALLING) UVLO threshold falling VIN falling 1.85 2.09 2.25 V
VFB Feedback voltage Adjustable version only 1.24 V
VOUT Output voltage accuracy Adjustable version, VOUT = VFB 1.228 1.24 1.252 V
VOUT Output voltage accuracyaccuracy for fixed output options Fixed output versions –1 1 %
ΔVOUT(ΔVIN) Line regulation(1) (VOUT(nom) + 0.8 V or 2.4 V) ≤ VIN ≤ 18 V –0.1 0.1 %
ΔVOUT(ΔIOUT) Load regulation 1 mA ≤ IOUT ≤ 500 mA –0.5 0.5 %
VDO Dropout voltage(2) IOUT = 100 mA 92 145 mV
IOUT = 250 mA 173 280
IOUT = 500 mA 355 590
ICL Output current limit VOUT = 0.9 × VOUT(nom) 525 717 970 mA
IGND Ground pin current IOUT = 0 mA 2 4.5 µA
IOUT = 1 mA 15
ISHUTDOWN Shutdown current VEN ≤ 0.4 V, VIN = 2.4 V, Iout = 0 mA 325 600 nA
IFB FB pin current 10 nA
IEN EN pin current VEN = 18 V 10 nA
VEN(HI) Enable pin high-level input voltage Device enabled 0.9 V
VEN(LOW) Enable pin low-level input voltage Device disabled 0.4 V
VIT(PG,RISING) PG pin threshold rising RPULLUP = 10 kΩ, VOUT rising,
VIN ≥ VUVLO(RISING) 		93 96.5 %VOUT
VHYS(PG) PG pin hysteresis RPULLUP = 10 kΩ, VOUT falling,
VIN ≥ VUVLO(RISING) 		3 %VOUT
VIT(PG,FALLING) PG pin threshold falling RPULLUP = 10 kΩ, VOUT falling,
VIN ≥ VUVLO(RISING) 		84 90 %VOUT
VOL(PG) PG pin low level output voltage VOUT < VIT(PG,FALLING), IPG-SINK = 500 µA 0.4 V
ILKG(PG) PG pin leakage current VOUT > VIT(PG,RISING), VPG = 18 V 5 300 nA
PSRR Power-supply rejection ratio f = 10 Hz 75 dB
f = 100 Hz 62
f = 1 kHz 52
Vn Output noise voltage BW = 10 Hz to 100 kHz, VOUT = 1.2 V 300 μVRMS
TSD(shutdown) Thermal shutdown temperature Shutdown, temperature increasing 165 °C
TSD(reset) Thermal shutdown reset temperature Reset, temperature decreasing 145 °C
(1) Vout(nom) + 0.8 V or 2.4 V (whichever is greater).
(2) VDO is measured with VIN = 0.97 × VOUT(nom) for fixed output voltage versions. VDO is not measured for fixed output voltage versions when VOUT ≤ 2.5 V. For the adjustable output device, VDO is measured with VFB = 0.97 × VFB(nom).