JAJSH18A March   2019  – September 2019

PRODUCTION DATA.

1. 特長
2. アプリケーション
3. 概要
1.     Device Images
4. 改訂履歴
5. 概要（続き）
6. Pin Configuration and Functions
7. Specifications
8. Detailed Description
1. 8.1 Overview
2. 8.2 Functional Block Diagram
3. 8.3 Feature Description
4. 8.4 Device Functional Modes
9. Application and Implementation
1. 9.1 Application Information
2. 9.2 Typical Application
1. 9.2.1 Design Requirements
2. 9.2.2 Detailed Design Procedure
3. 9.2.3 Application Curves
10. 10Power Supply Recommendations
11. 11Layout
12. 12デバイスおよびドキュメントのサポート
1. 12.1 デバイス・サポート
1. 12.1.1 開発サポート
2. 12.1.2 デバイスの項目表記
2. 12.2 ドキュメントのサポート
3. 12.3 ドキュメントの更新通知を受け取る方法
4. 12.4 コミュニティ・リソース
5. 12.5 商標
6. 12.6 静電気放電に関する注意事項
7. 12.7 Glossary
13. 13メカニカル、パッケージ、および注文情報

• PWP|14
• PWP|14

#### 9.1.8 Power Dissipation (PD)

To ensure proper thermal design, the printed circuit board (PCB) area around the TPS7A78 must include a minimal of heat-generating devices to avoid added thermal stress. The three internal sources that dissipate power are: the bridge rectifier conduction losses, the switched-capacitor stage, and the LDO. For devices with an output voltage greater 3.3 V, the maximum power dissipation under a maximum load current of 120 mA is estimated to be between 160 mW and 190 mW, assuming a nominal CS capacitor value for the given load current. For applications with less than a 3.3-V output , the power dissipated in the LDO is the dominant power and can be calculated using Equation 4 because the dropout voltage between VLDO_IN and VLDO_OUT can be as high as 2.7 V for the 1.3-V output option. See the Dropout Voltage Regulation section for details on dropout voltage.

Equation 4. PD_LDO = (VLDO_IN – VLDO_OUT) × IOUT

The higher dropout for less than 2.0-V output voltage options may run the device into thermal limitations at the startup ramp for higher temperatures, especially with the large LDO_OUT pin capacitor or when close to the maximum load. The thermal pad under the TPS7A78 must contain an array of filled vias that conduct heat to additional copper planes for increased heat dissipation. The amount of thermal dissipation determines the maximum allowable ambient temperature (TA) for the device. According to Equation 5, power dissipation and junction temperature are determined by the junction-to-ambient thermal resistance (RθJA) of the combined PCB and device package as well as the temperature of the ambient air (TA).

Equation 5. TJ = TA + (RθJA × PD)

Thermal resistance (RθJA) is highly dependent on the heat-spreading capability built into the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The junction-to-ambient thermal resistance listed in the Thermal Information table is determined by the JEDEC standard PCB and copper-spreading area, and is used as a relative measure of package thermal performance, but not indicative of performance in any particular implementation.