10.1 Layout Guidelines

10.2 Layout Example

Figure 33. TPS7A8101 Layout Example

10.3 Thermal Protection

Thermal protection disables the output when the junction temperature rises to approximately 160°C, allowing the device to cool. When the junction temperature cools to approximately 140°C the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage because of overheating.

Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to 125°C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least 35°C above the maximum expected ambient condition of your particular application. This configuration produces a worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.

The internal protection circuitry of the TPS7A8101 has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS7A8101 into thermal shutdown degrades device reliability.

10.4 Power Dissipation

Knowing the device power dissipation and proper sizing of the thermal plane that is connected to the tab or pad is critical to avoiding thermal shutdown and ensuring reliable operation.

Power dissipation of the device depends on input voltage and load conditions and can be calculated using Equation 3:

Equation 3.

Power dissipation can be minimized and greater efficiency can be achieved by using the lowest possible input voltage necessary to achieve the required output voltage regulation.

On the SON (DRB) package, the primary conduction path for heat is through the exposed pad to the printed-circuit-board (PCB). The pad can be connected to ground or be left floating; however, it should be attached to an appropriate amount of copper PCB area to ensure the device does not overheat. The maximum junction-to-ambient thermal resistance depends on the maximum ambient temperature, maximum device junction temperature, and power dissipation of the device and can be calculated using Equation 4:

Equation 4.

Knowing the maximum R_θJA, the minimum amount of PCB copper area needed for appropriate heatsinking can be estimated using Figure 34.

NOTE:

θ_JA value at board size of 9 in² (that is, 3 in × 3 in) is a JEDEC standard.

Figure 34. θ_JA vs Board Size

Figure 34 shows the variation of θ_JA as a function of ground plane copper area in the board. It is intended only as a guideline to demonstrate the effects of heat spreading in the ground plane and should not be used to estimate actual thermal performance in real application environments.

10.5 Estimating Junction Temperature

Using the thermal metrics Ψ_JT and Ψ_JB, as shown in the Thermal Information table, the junction temperature can be estimated with corresponding formulas (given in Equation 5). For backwards compatibility, an older θ_JC,Top parameter is listed as well.

Equation 5.

Where P_D is the power dissipation shown by Equation 4, T_T is the temperature at the center-top of the IC package, and T_B is the PCB temperature measured 1 mm away from the IC package on the PCB surface (as Figure 35 shows).

Figure 35. Measuring Points for T_T and T_B

For more information about measuring T_T and T_B, see the application note SBVA025, Using New Thermal Metrics, available for download at www.ti.com.

By looking at Figure 36, the new thermal metrics (Ψ_JT and Ψ_JB) have very little dependency on board size. That is, using Ψ_JT or Ψ_JB with Equation 5 is a good way to estimate T_J by simply measuring T_T or T_B, regardless of the application board size.

Figure 36. Ψ_JT and Ψ_JB vs Board Size

For a more detailed discussion of why TI does not recommend using θ_JC(top) to determine thermal characteristics, refer to application report SBVA025, Using New Thermal Metrics, available for download at www.ti.com. For further information, refer to application report SPRA953, IC Package Thermal Metrics, also available on the TI website.