SLUSBZ6A April   2016  – August 2016 TPS92515 , TPS92515-Q1 , TPS92515HV , TPS92515HV-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Simplified Buck LED Driver Application
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1. Table 1. Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  General Operation
      2. 8.3.2  Current Sense Comparator
      3. 8.3.3  OFF Timer
      4. 8.3.4  OFF-Timer, Shunt FET Dimming or Shunted Output Condition
      5. 8.3.5  Internal N-channel MOSFET
        1. 8.3.5.1 Drop-Out
      6. 8.3.6  VCC Internal Regulator and Undervoltage Lockout (UVLO)
      7. 8.3.7  Analog Adjust Input
        1. 8.3.7.1 IADJ Pin Clamp
        2. 8.3.7.2 IADJ Pin Clamp Characteristic
        3. 8.3.7.3 Analog Adjust (IADJ Pin) Control Methods
        4. 8.3.7.4 IADJ Control Method Notes
      8. 8.3.8  Thermal Protection
        1. 8.3.8.1 Maximum Output Current and Junction Temperature
      9. 8.3.9  Junction Temperature Relative Estimation
      10. 8.3.10 BOOT and BOOT UVLO
        1. 8.3.10.1 Start-Up, BOOT-UVLO and Pre-Charged Condition
      11. 8.3.11 PWM (UVLO and Enable)
        1. 8.3.11.1 Using PWM for UVLO (Undervoltage Lockout) Protection
          1. 8.3.11.1.1 UVLO Programming Resistors
        2. 8.3.11.2 Using PWM for Digitally Controlled Enable
        3. 8.3.11.3 UVLO: VIN, VCC and BOOT UVLO
        4. 8.3.11.4 Analog and PWM Dimming - Normalized Results and Comparison
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 General Design Procedure
        1. 9.2.1.1 Calculating Duty Cycle
        2. 9.2.1.2 Calculate OFF-Time Estimate
        3. 9.2.1.3 Calculate OFF-Time Resistor ROFF
        4. 9.2.1.4 Calculate the Minimum Inductance Value
        5. 9.2.1.5 Calculate the Sense Resistance
        6. 9.2.1.6 Calculate Input Capacitance
        7. 9.2.1.7 Calculate Output Capacitance
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Calculating Duty Cycle
        2. 9.2.3.2 Calculate OFF-Time Estimate
        3. 9.2.3.3 Calculate OFF-Time Resistor ROFF
        4. 9.2.3.4 Calculate the Inductance Value
        5. 9.2.3.5 Calculate the Sense Resistance
        6. 9.2.3.6 Calculate Input Capacitance
        7. 9.2.3.7 Verify Peak Current for Inductor Selection
        8. 9.2.3.8 Calculate Output Capacitance
        9. 9.2.3.9 Calculate UVLO Resistance Values
      4. 9.2.4 Application Curves
    3. 9.3 Dos and Don'ts
  10. 10Power Supply Recommendations
    1. 10.1 Input Source Direct from Battery
    2. 10.2 Input Source from a Boost Stage
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
        1. 12.1.1.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.4 OFF-Timer, Shunt FET Dimming or Shunted Output Condition

The OFF-time is derived from the output voltage to create a constant inductor ripple. A constant inductor ripple ensures linearity when dimming. When the dimming method selected requires the output to be shorted, (shunt FET or Switched Matrix approach) it is necessary to derive the OFF-time ramp from an alternate source. When the output is shunted, the output voltage becomes very low and possibly less than the 1 V OFF-timer threshold voltage. If this occurs, the off timer is not able to trip and the OFF-time reaches the maximum OFF-time before the switch is turned on again. The system is able to operate in this mode, but constant inductor current ripple and linear shunt-FET dimming is not possible. To avoid this situation, VCC can be used as a parallel source to charge the COFF capacitor and maintain a constant ripple even when the output is shorted. This ensures precise dimming linearity. Refer to Figure 14 for connection information.

It is not recommended to apply power to the OFF-timer circuitry while the VIN pin is not powered. The device includes an internal diode between the COFF pin and the VCC pin. If the COFF pin receives power with no input voltage (VIN) applied, VCC pin voltage could inadvertently be pulled up and cause the device to attempt operation. This attempt could negatively affect the application if this operation is not desired.

Selecting the value for ROFF2 is a two-step process.

The first step is to compute the OFF-time required when the output is shunted (tOFF-Shunt).

Equation 8. TPS92515 TPS92515-Q1 TPS92515HV TPS92515HV-Q1 q_coff_slusbz6.gif

where

  • VSHUNT is the output voltage when the shunt device or LED Matrix device is ON

The second steps is to compute ROFF2 using (tOFF-Shunt).

Equation 9. TPS92515 TPS92515-Q1 TPS92515HV TPS92515HV-Q1 q_roff2_slvsbz6.gif

The value of ROFF1 becomes the previously calculated value of ROFF.

The result of these calculations produce an inductor current that maintains the same DC value when shunted or when not shunted as shown in Figure 15.

TPS92515 TPS92515-Q1 TPS92515HV TPS92515HV-Q1 ROFFconnection.gifFigure 14. Shunt Dimming COFF Connection
TPS92515 TPS92515-Q1 TPS92515HV TPS92515HV-Q1 ShuntFET_Optimal.png
Ch1: PWM Signal Time: 400 µs/div
Ch4: Inductor current No Output Capacitor
Figure 15. Shunt FET Dimming with Optimized Inductor Current