JAJSKJ1A December   2020  – February 2021 TPS929121-Q1

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device Bias and Power
        1. 8.3.1.1 Power Supply (SUPPLY)
        2. 8.3.1.2 5-V Low-Drop-Out Linear Regulator (VLDO)
        3. 8.3.1.3 Undervoltage Lockout (UVLO) and Power-On-Reset (POR)
        4. 8.3.1.4 Programmable Low Supply Warning
      2. 8.3.2 Constant Current Output
        1. 8.3.2.1 Reference Current With External Resistor (REF)
        2. 8.3.2.2 64-Step Programmable High-Side Constant-Current Output
      3. 8.3.3 PWM Dimming
        1. 8.3.3.1 PWM Dimming Frequency
        2. 8.3.3.2 PWM Generator
        3. 8.3.3.3 Linear Brightness Control
        4. 8.3.3.4 Exponential Brightness Control
        5. 8.3.3.5 External Clock Input for PWM Generator (CLK)
        6. 8.3.3.6 External PWM Input ( PWM0 and PWM1)
      4. 8.3.4 On-chip 8-bit Analog-to-Digital Converter (ADC)
      5. 8.3.5 Diagnostic and Protection in Normal State
        1. 8.3.5.1  Fault Masking
        2. 8.3.5.2  Supply Undervoltage Lockout Diagnostics in Normal State
        3. 8.3.5.3  Low-Supply Warning Diagnostics in Normal State
        4. 8.3.5.4  Reference Diagnostics in Normal State
        5. 8.3.5.5  Pre-Thermal Warning and Overtemperature Protection in Normal State
        6. 8.3.5.6  Communication Loss Diagnostic in Normal State
        7. 8.3.5.7  LED Open-Circuit Diagnostics in Normal State
        8. 8.3.5.8  LED Short-Circuit Diagnostics in Normal State
        9. 8.3.5.9  On-Demand Off-State Invisible Diagnostics
        10. 8.3.5.10 On-Demand Off-State Single-LED Short-Circuit (SS) Diagnostics
        11. 8.3.5.11 Automatic Single-LED Short-Circuit (AutoSS) Detection in Normal State
        12. 8.3.5.12 EEPROM CRC Error in Normal State
        13.       48
      6. 8.3.6 Diagnostic and Protection in Fail-Safe States
        1. 8.3.6.1 Fault Masking
        2. 8.3.6.2 Supply UVLO Diagnostics in Fail-Safe States
        3. 8.3.6.3 Low-supply Warning Diagnostics in Fail-Safe states
        4. 8.3.6.4 Reference Diagnostics at Fail-Safe States
        5. 8.3.6.5 Overtemperature Protection in Fail-Safe State
        6. 8.3.6.6 LED Open-circuit Diagnostics in Fail-Safe State
        7. 8.3.6.7 LED Short-circuit Diagnostics in Fail-Safe State
        8. 8.3.6.8 EEPROM CRC Error in Fail-safe State
        9.       58
    4. 8.4 Device Functional Modes
      1. 8.4.1 POR State
      2. 8.4.2 Initialization State
      3. 8.4.3 Normal State
      4. 8.4.4 Fail-Safe States
      5. 8.4.5 Program State
      6. 8.4.6 Programmable Output Failure State
      7. 8.4.7 ERR Output
      8. 8.4.8 Register Default Data
    5. 8.5 Programming
      1. 8.5.1 FlexWire Protocol
        1. 8.5.1.1 Protocol Overview
        2. 8.5.1.2 UART Interface Address Setting
        3. 8.5.1.3 Status Response
        4. 8.5.1.4 Synchronization Byte
        5. 8.5.1.5 Device Address Byte
        6. 8.5.1.6 Register Address Byte
        7. 8.5.1.7 Data Frame
        8.       77
        9. 8.5.1.8 CRC Frame
        10. 8.5.1.9 Burst Mode
      2. 8.5.2 Registers Lock
      3. 8.5.3 All Registers CRC Check
      4. 8.5.4 EEPROM Programming
        1. 8.5.4.1 Chip Selection by Pulling REF Pin High
        2. 8.5.4.2 Chip Selection by ADDR Pins configuration
        3. 8.5.4.3 EEPROM Register Access and Burn
        4. 8.5.4.4 EEPROM Program State Exit
        5. 8.5.4.5 Reading Back EEPROM
    6. 8.6 Register Maps
      1. 8.6.1 FullMap Registers
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Smart Rear Lamp With Distributed LED drivers
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 サポート・リソース
    3. 12.3 Trademarks
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 用語集
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

TJ = –40°C to 150°C, V(SUPPLY) = 5-40 V, For digital outputs, C(LOAD) = 20 pF, (unless otherwise noted).
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
BIAS
V(SUPPLY)Operating input voltage4.51240V
IQ(ON)Quiescent current, all-channels-onV(SUPPLY) = 12 V, R(REF) =31.6 kΩ, all-output ON10mA
IQ(OFF)Quiescent current, all-channels-offV(SUPPLY) = 12 V, R(REF) = 31.6 kΩ, all-output OFF3.5mA
I(FAULT)Quiescent current, fail-safe state fault modeV(SUPPLY) = 12 V, fail-safe state, all-output OFF, ERR = LOW2.52.85mA
V(POR_rising)Power-on-reset rising threshold44.24.4V
V(POR_falling)Power-on-reset falling threshold3.844.2V
V(LDO)LDO output voltageV(SUPPLY) > 5.6 V, I(LDO) = 40 mA, CONF_LDO = 0b4.7555.25V
V(SUPPLY) > 5.6 V, I(LDO) = 40 mA, CONF_LDO = 1b4.184.44.62V
I(LDO)LDO output current capability80mA
I(LDO_LIMIT)LDO output current limit100mA
V(LDO_DROP)LDO maximum dropout voltageI(LDO) = 80 mA0.50.9V
V(LDO_DROP)LDO maximum dropout voltageI(LDO) = 50 mA0.30.6V
V(LDO_POR_rising)LDO power-on-reset rising threshold2.7533.25V
V(LDO_POR_falling)LDO power-on-reset falling threshold2.52.753V
C(LDO)Supported LDO loading capacitance range110µF
f(OSC)Internal oscillator frequency-2.5%32.15+2.5%MHz
ERR
VIL(ERR)Input logic low voltage, ERR0.7V
VIH(ERR)Input logic high voltage, ERR2V
I(pd_ERR)ERR pull-down current capabilityV(ERR) = 0.4 V369mA
Ilkg(ERR)ERR leakage current1µA
FLEXWIRE INTERFACE
VIL(RX)Input logic low voltage, RX0.7V
VIH(RX)Input logic high voltage, RX2V
VOL(TX)Low-level output voltage TX,Isink = 5 mA,00.3V
VOH(TX)High-level output voltage TX,Isource = 5 mA, Vpull-up = 5 V4.75V
IlkgTX, RX–11µA
ADDRESS, FS
VIL(IO)Input logic low voltage, ADDR2/CLK, ADDR1/PWM1, ADDR0/PWM0, FS0.7V
VIH(IO)Input logic high voltage, ADDR2/CLK, ADDR1/PWM1, ADDR0/PWM0, FS2V
R(PD_ADDR)Internal pull down resistance, ADDR2/CLK, ADDR1/PWM1, ADDR0/PWM0100
R(PD_FS)Internal pull down resistance, FS100
ADC
DNLDifferential nonlinearity–1(1)1(1)LSB
INLIntegral nonlinearity–2(1)2(1)LSB
OUTPUT DRIVERS
f(PWM_200)200-Hz selection200Hz
f(PWM_1000)1-kHz selection1000Hz
ΔI(OUT_d2d)Device-to-device accuracy ΔI(OUT_d2d) = 1- Iavg(OUT) / Iideal(OUT)R(REF) = 8.45 kOhm, CONF_REFRANGE = 11b, DC=63–505%
R(REF) = 8.45 kOhm, CONF_REFRANGE = 10b, DC=63–505
R(REF) = 8.45 kOhm, CONF_REFRANGE = 01b, DC=63–505
R(REF) = 8.45 kOhm, CONF_REFRANGE = 00b, DC=63–505
ΔI(OUT_c2c)Channel-to-channel accuracy ΔI(OUT_c2c) = 1- I(OUTx) / Iavg(OUT)R(REF) = 8.45 kOhm, CONF_REFRANGE = 11b, DC=63–303%
R(REF) = 8.45 kOhm, CONF_REFRANGE = 10b, DC=31–303
R(REF) = 8.45 kOhm, CONF_REFRANGE = 01b, DC=15–505
R(REF) = 31.6 kOhm, CONF_REFRANGE = 01b, DC=12–707
I(OUT_75mA)R(REF) = 8.45 kOhm, CONF_REFRANGE = 11b, DC=6375mA
I(OUT_50mA)R(REF) = 12.7 kOhm, CONF_REFRANGE = 11b, DC=6350mA
I(OUT_20mA)R(REF) = 31.6 kOhm, CONF_REFRANGE = 11b, DC=6320mA
I(OUT_1mA)R(REF) = 31.6 kOhm, CONF_REFRANGE = 01b, DC = 121mA
V(OUT_drop)output dropout voltageR(REF) = 8.45 kOhm, CONF_REFRANGE = 11b, DC=38, I(OUTx) = 45 mA400700mV
V(OUT_drop)output dropout voltageR(REF) = 8.45 kOhm, CONF_REFRANGE = 11b, DC=63, I(OUTx) = 75 mA6001000mV
R(REF)150
C(REF)04.7nF
V(REF)1.235V
K(REF_11)CONF_REFRANGE = 11b512
K(REF_10)CONF_REFRANGE = 10b256
K(REF_01)CONF_REFRANGE = 01b128
K(REF_00)CONF_REFRANGE = 00b64
I(REF_OPEN_th)10µA
V(REF_SHORT_th)0.6V
DIAGNOSTICS
V(OPEN_th_rising)LED open rising thresholdV(SUPPLY) - V(OUTx)200400600mV
V(OPEN_th_falling)LED open falling thresholdV(SUPPLY) - V(OUTx)300500700mV
V(OPEN_th_hyst)100mV
V(SG_th_rising)Short-to-ground
rising threshold
0.80.91V
V(SG_th_falling)Short-to-ground
falling threshold
1.11.21.3V
V(SG_th_hyst)Short-to-ground
hysteresis
0.3V
EEPROM
N(EEP)Number of programming cycles.V(SUPPLY) = 12 V1000
MISC
T(PRETSD)Pre-thermal warning threshold135oC
T(PRETSD_HYS)Pre-thermal warning hysteresis5oC
T(TSD)Over-temperature
protection threshold
160175190oC
T(TSD_HYS)Over-temperature
protection hysteresis
15oC
Guaranteed by design only