JAJSDM4D July   2017  – October 2019 TSV911 , TSV912 , TSV914

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ローサイドのモータ制御
      2.      小信号のオーバーシュートと負荷容量との関係
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions: TSV911
    2.     Pin Functions: TSV912
    3.     Pin Functions: TSV914
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: TSV911
    5. 7.5 Thermal Information: TSV912
    6. 7.6 Thermal Information: TSV914
    7. 7.7 Electrical Characteristics: VS (Total Supply Voltage) = (V+) – (V–) = 2.5 V to 5.5 V
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rail-to-Rail Input
      2. 8.3.2 Rail-to-Rail Output
      3. 8.3.3 Packages with an Exposed Thermal Pad
      4. 8.3.4 Overload Recovery
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Input and ESD Protection
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • D|14
  • PW|14
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

TSV911 DBV Package
5-Pin SOT-23
Top View
TSV911 TSV912 TSV914 po_sot23-5_bos406.gif
TSV911 DCK Package
5-Pin SC70
Top View

Pin Functions: TSV911

PIN I/O DESCRIPTION
NAME NO.
DBV (SOT-23) DCK (SC70)
–IN 4 3 I Inverting input
+IN 3 1 I Noninverting input
OUT 1 4 O Output
V– 2 2 — Negative (lowest) supply or ground (for single-supply operation)
V+ 5 5 — Positive (highest) supply
TSV912 D, DGK, DDF Packages
8-Pin SOIC, VSSOP
Top View
TSV911 TSV912 TSV914 po_so_msop_bos406.gif
TSV912 DSG Package
8-Pin WSON With Exposed Thermal Pad
Top View
TSV911 TSV912 TSV914 po_drb_dfn-8_bos563.gif
1. Connect exposed thermal pad to V–. See Packages with an Exposed Thermal Pad section for more information.

Pin Functions: TSV912

PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V– 4 — Negative (lowest) supply or ground (for single-supply operation)
V+ 8 — Positive (highest) supply
TSV914 D, PW Packages
14-Pin SOIC, TSSOP
Top View
TSV911 TSV912 TSV914 po_pw_tssop-14_bos563.gif

Pin Functions: TSV914

PIN I/O DESCRIPTION
NAME NO.
–IN A 2 I Inverting input, channel A
+IN A 3 I Noninverting input, channel A
–IN B 6 I Inverting input, channel B
+IN B 5 I Noninverting input, channel B
–IN C 9 I Inverting input, channel C
+IN C 10 I Noninverting input, channel C
–IN D 13 I Inverting input, channel D
+IN D 12 I Noninverting input, channel D
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V– 11 — Negative (lowest) supply or ground (for single-supply operation)
V+ 4 — Positive (highest) supply