JAJSG68A September   2018  – December 2018 TUSB217-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
      1. 7.2.1 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 High speed boost
      2. 7.3.2 RX Sensitivity
    4. 7.4 Device Functional Modes
      1. 7.4.1 Low Speed (LS) mode
      2. 7.4.2 Full Speed (FS) mode
      3. 7.4.3 High Speed (HS) mode
      4. 7.4.4 High Speed downstream port electrical compliance test mode
      5. 7.4.5 Shutdown mode
      6. 7.4.6 I2C mode
    5. 7.5 TUSB217 Registers
      1. 7.5.1 EDGE_BOOST Register (Offset = 0x1) [reset = X]
        1. Table 4. EDGE_BOOST Register Field Descriptions
      2. 7.5.2 CONFIGURATION Register (Offset = 0x3) [reset = X]
        1. Table 5. CONFIGURATION Register Field Descriptions
      3. 7.5.3 DC_BOOST Register (Offset = 0xE) [reset = X]
        1. Table 6. DC_BOOST Register Field Descriptions
      4. 7.5.4 RX_SEN Register (Offset = 0x25) [reset = X]
        1. Table 7. RX_SEN Register Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Test Procedure to Construct USB High Speed Eye Diagram
          1. 8.2.2.1.1 For a Host Side Application
          2. 8.2.2.1.2 For a Device Side Application
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RGY|14
サーマルパッド・メカニカル・データ
発注情報

7.5.1 EDGE_BOOST Register (Offset = 0x1) [reset = X]

EDGE_BOOST is shown in Figure 3 and described in Table 4.

Return to Summary Table.

This register is setting EDGE BOOST level.

Figure 3. EDGE_BOOST Register
7 6 5 4 3 2 1 0
ACB_LVL RESERVED
RH/W-X RH/W-X

Table 4. EDGE_BOOST Register Field Descriptions

Bit Field Type Reset Description
7-4 ACB_LVL RH/W X

XXXXb (sampled at startup from BOOST pin)
0000b to 1111b range

0x0 = BOOST PIN LEVEL 0 (lowest edge boost setting)

0x3 = BOOST PIN LEVEL 1

0x6 = BOOST PIN LEVEL 2

0x8 = BOOST PIN LEVEL 3

0xF = (highest edge boost setting)

3-0 RESERVED RH/W X

These bits are reserved bits and set by hardware at reset.
When this register is modified the software should first read these reserved bits and rewrite with the same values