SLLSEF6C July   2014  – June 2017 TUSB8020B

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 3.3-V I/O Electrical Characteristics
    6. 7.6 Power-Up Timing Requirements
    7. 7.7 Hub Input Supply Current
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Battery Charging Features
      2. 8.3.2 USB Power Management
      3. 8.3.3 One-Time Programmable (OTP) Configuration
      4. 8.3.4 Clock Generation
        1. 8.3.4.1 Crystal Requirements
        2. 8.3.4.2 Input Clock Requirements
      5. 8.3.5 Power-Up and Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 External Configuration Interface
      2. 8.4.2 I2C EEPROM Operation
      3. 8.4.3 SMBus Slave Operation
    5. 8.5 Register Maps
      1. 8.5.1 Configuration Registers
        1. 8.5.1.1  ROM Signature Register (offset = 0h) [reset = 0h]
        2. 8.5.1.2  Vendor ID LSB Register (offset = 1h) [reset = 51h]
        3. 8.5.1.3  Vendor ID MSB Register (offset = 2h) [reset = 4h]
        4. 8.5.1.4  Product ID LSB Register (offset = 3h) [reset = 25h]
        5. 8.5.1.5  Product ID MSB Register (offset = 4h) [reset = 80h]
        6. 8.5.1.6  Device Configuration Register (offset = 5h) [reset = 1Xh]
        7. 8.5.1.7  Battery Charging Support Register (offset = 6h) [reset = 0Xh]
        8. 8.5.1.8  Device Removable Configuration Register (offset = 7h) [reset = 0Xh]
        9. 8.5.1.9  Port Used Configuration Register (offset = 8h) [reset = 0h]
        10. 8.5.1.10 PHY Custom Configuration Register (offset = 9h) [reset = 0h]
        11. 8.5.1.11 Device Configuration Register 2 (offset = Ah)
        12. 8.5.1.12 UUID Registers (offset = 10h to 1Fh)
        13. 8.5.1.13 Language ID LSB Register (offset = 20h)
        14. 8.5.1.14 Language ID MSB Register (offset = 21h)
        15. 8.5.1.15 Serial Number String Length Register (offset = 22h)
        16. 8.5.1.16 Manufacturer String Length Register (offset = 23h)
        17. 8.5.1.17 Product String Length Register (offset = 24h)
        18. 8.5.1.18 Serial Number Registers (offset = 30h to 4Fh)
        19. 8.5.1.19 Manufacturer String Registers (offset = 50h to 8Fh)
        20. 8.5.1.20 Product String Registers (offset = 90h to CFh)
        21. 8.5.1.21 Additional Feature Configuration Register (offset = F0h)
        22. 8.5.1.22 Charging Port Control Register (offset = F2h)
        23. 8.5.1.23 Device Status and Command Register (offset = F8h)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Upstream Port Implementation
        2. 9.2.2.2 Downstream Port 1 Implementation
        3. 9.2.2.3 Downstream Port 2 Implementation
        4. 9.2.2.4 VBUS Power Switch Implementation
        5. 9.2.2.5 Clock, Reset, and Miscellaneous
        6. 9.2.2.6 Power Implementation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply
    2. 10.2 Downstream Port Power
    3. 10.3 Ground
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Placement
      2. 11.1.2 Package Specific
      3. 11.1.3 Differential Pairs
    2. 11.2 Layout Example
      1. 11.2.1 Upstream Port
      2. 11.2.2 Downstream Port
      3. 11.2.3 Thermal Pad
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

9.1 Application Information

The TUSB8020B is a two-port USB 3.0 compliant hub. It provides simultaneous SuperSpeed USB and high-speed/full-speed connections on the upstream port and provides SuperSpeed USB, high-speed, full-speed, or low-speed connections on the downstream port. The TUSB8020B can be used in any application that needs additional USB compliant ports. For example, a specific notebook may only have two downstream USB ports. By using the TUSB8020B, the notebook can increase the downstream port count to three.

9.2 Typical Application

A common application for the TUSB8020B is as a self-powered standalone USB hub product. The product is powered by an external 5-V DC power adapter. In this application using a USB cable, TUSB8020B device’s upstream port is plugged into a USB host controller. The downstream ports of the TUSB8020B are exposed to users for connecting USB hard drives, camera, flash drive, and so forth.

TUSB8020B discrete_USB_hub_LLSEF6.gif Figure 26. Discrete USB Hub Product

9.2.1 Design Requirements

Table 27. Input Parameters

DESIGN PARAMETER EXAMPLE VALUE
VDD supply 1.1 V
VDD33 supply 3.3 V
Upstream port USB support (SS, HS, FS) SS, HS, FS
Downstream port 1 USB support (SS, HS, FS, LS) SS, HS, FS, LS
Downstream port 2 USB support (SS, HS, FS, LS) SS, HS, FS, LS
Number of removable downstream ports 2
Number of non-removable downstream ports 0
Full power management of downstream ports Yes (FULLPWRMGMTZ = 0)
Individual control of downstream port power switch Yes (GANGED = 0)
Power switch enable polarity Active high (PWRCTL_POL = 0)
Battery charge support for downstream port 1 Yes
Battery charge support for downstream port 2 Yes
I2C EEPROM support No
24-MHz clock source Crystal

9.2.2 Detailed Design Procedure

9.2.2.1 Upstream Port Implementation

The upstream of the TUSB8020B is connected to a USB3 type B connector. This particular example has GANGED terminal and FULLPWRMGMTZ terminal pulled low, which results in individual power support each downstream port. The VBUS signal from the USB3 type B connector is fed through a voltage divider. The purpose of the voltage divider is to make sure the level meets USB_VBUS input requirements.

TUSB8020B upstream_porta_sllsef7.gif Figure 27. Upstream Port Implementation

9.2.2.2 Downstream Port 1 Implementation

The downstream port 1 of the TUSB8020B is connected to a USB3 type A connector. With BATEN1 terminal pulled up, battery charge support is enabled for port 1. If battery charge support is not needed, then the pullup resistor on BATEN1 should be uninstalled. The PWRCTL_POL is pulled-down, which results in active-high power enable (PWRCTL1 and PWRCTL2) for a USB VBUS power switch.

TUSB8020B downstream_port1a_sllsef7.gif Figure 28. Downstream Port 1 Implementation

9.2.2.3 Downstream Port 2 Implementation

The downstream port 2 of the TUSB8020B is connected to a USB3 type A connector. With BATEN2 terminal pulled up, battery charge support is enabled for port 2. If battery charge support is not needed, then the pullup resistor on BATEN2 should be uninstalled.

TUSB8020B downstream_port2a_sllsef7.gif Figure 29. Downstream Port 2 Implementation

9.2.2.4 VBUS Power Switch Implementation

This particular example uses the TI TPS2561 dual-channel precision adjustable current-limited power switch. For details on this power switch or other power switches available from TI, refer to www.ti.com.

TUSB8020B vbus_pwr_switcha_sllsef7.gif Figure 30. Power Switch Implementation

9.2.2.5 Clock, Reset, and Miscellaneous

TUSB8020B clock_reset_misca_sllsef7.gif Figure 31. Clock, Reset, and Miscellaneous

9.2.2.6 Power Implementation

TUSB8020B pwr_impa_sllsef7.gif Figure 32. Power Implementation

9.2.3 Application Curves

TUSB8020B ss_ds1_sllsef7.gif Figure 33. SuperSpeed TX Eye for Downstream Port 1
TUSB8020B hs_ds1_b_sllsef7.gif Figure 35. HighSpeed TX Eye for Downstream Port 1
TUSB8020B ss_ds2_sllsef7.gif Figure 34. SuperSpeed TX Eye for Downstream Port 2
TUSB8020B hs_ds2_b_sllsef7.gif Figure 36. HighSpeed TX Eye for Downstream Port 2