JAJSE40A October 2017 – February 2018 UCC28780
The voltage at the BUR pin (VBUR) sets a target peak current threshold (VCST(BUR)) which programs the onset of adaptive burst mode (ABM) and determines the clamped peak current level of switching cycles in each burst packet. When VBUR is designed higher, ABM will start at heavier output load conditions with higher peak current, so the benefit is the higher light-load efficiency but the side effect is a larger burst output voltage ripple. Therefore, 50% to 60% of output load at high line is the recommended highest load condition entering into ABM (Io(BUR)) for both Si and GaN-based ACF designs. The gain between VBUR and VCST(BUR) is a constant gain of KBUR-CST, so setting VCST(BUR) just requires properly selecting the resistor divider on the BUR pin formed by RBUR1 and RBUR2. VBUR should be set between 0.7 V and 2.4 V. If VBUR is less than 0.7 V, VCST(BUR) holds at 0.7 V / KBUR-CST. If VBUR is higher than 2.4 V, VCST(BUR) stays at 2.4 V / KBUR-CST.
In order to enhance the mode transition between ABM and Low Power Mode (LPM), a programmable offset voltage (ΔVBUR) is generated on top of the VBUR setting in ABM through an internal 2.7-μA current source (IBUR), as shown in Figure 12. In ABM mode, VBUR is set through the resistor voltage divider to fulfill the target average efficiency. After transition from ABM to LPM, the current source is enabled in LPM and flows out of the BUR pin, so ΔVBUR can be programmed based on the Thevenin resistance on the BUR pin, which can be expressed as
When VBUR becomes higher after transition to LPM, the initial peak magnetizing current in LPM is increased with larger energy per switching cycle in a burst packet, which forces UCC28780 to stay in LPM with a higher feedback current than ABM. If ΔVBUR is designed too small, it is possible that mode toggling between LPM and ABM can occur resulting in audible noise. For that situation, ΔVBUR greater than 100 mV is recommended. To minimize the noise coupling effect on VBUR, a filter capacitor on the BUR pin (CBUR) may be needed. CBUR needs to be properly designed to minimize the delay of generating ΔVBUR in time during mode transition. It is recommended that CBUR should be sized small enough to ensure ΔVBUR settles within 40 μs, corresponding to the burst frequency of 25 kHz in LPM (fLPM). Based on three RC time constants representing 95% of a settled steady state value from a step response, the design guide of CBUR is expressed as