AM5748 Sitara プロセッサ：マルチメディア機能、ECC @ DDR、セキュア・ブート機能搭載のデュアル Arm Cortex-A15 / デュアル DSP

概要

AM574x Sitara™ processors are Arm^® applications processors built to meet the intense processing needs of modern embedded products.

AM574x devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The devices also combine programmable video processing with a highly integrated peripheral set. Cryptographic acceleration is available in every AM574x device.

Programmability is provided by dual-core Arm® Cortex®-A15 RISC CPUs withNeon™ extension, and two TI C66x VLIW floating-point DSP cores, and two Embedded Vision Engines (EVEs). The Arm CPUs allow developers to keep control functions separate from other algorithms programmed on the DSPs and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm® and C66x DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

AM574x Sitara Arm applications processors are built to meet the intense processing needs of modern embedded products.

Programmability is provided by dual-core Arm Cortex-A15 RISC CPUs with Arm® Neon™ extension, and two TI C66x VLIW floating-point DSP cores. The Arm allows developers to keep control functions separate from other algorithms programmed on the DSPs and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm and C66x DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

特長

Dual Arm^® Cortex^®-A15 microprocessor subsystem
Up to two C66x floating-point VLIW DSP cores
- Fully object-code compatible with C67x and C64x+
- Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
Up to 2.5MB of on-chip L3 RAM
Two DDR3/DDR3L External Memory Interface (EMIF) modules
- Supports rates up to DDR3-1333
- Up to 2GB supported per EMIF
- ECC supported on primary EMIF
2× Dual Arm^® Cortex^®-M4 coprocessors (IPU1 and IPU2)
Up to two Embedded Vision Engines (EVEs)
IVA-HD subsystem
- 4K @ 15fps encode and decode support for H.264 CODEC
- Other CODECs are up to 1080p60
Display subsystem
- Full-HD video (1920 × 1080p, 60 fps)
- Multiple video inputs and video outputs
- 2D and 3D graphics
- Display controller with DMA engine and up to three pipelines
- HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
2× dual-core Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS)
2D-graphics accelerator (BB2D) subsystem
- Vivante^® GC320 core
Video Processing Engine (VPE)
Dual-core PowerVR^® SGX544 3D GPU
Secure boot support
- Hardware-enforced root-of-trust
- Customer programmable keys and OTP data
- Support for takeover protection, IP protection, and anti-roll back protection
Cryptographic acceleration support
- Supports cryptographic cores
  - AES – 128/192/256-bits key sizes
  - 3DES – 56/112/168-bits key sizes
  - MD5, SHA1
  - SHA2 – 224/256/384/512
  - True random number generator
- DMA support
Debug security
- Secure software controlled debug access
- Security aware debugging
Trusted Execution Environment (TEE) support
- Arm TrustZone^® based TEE
- Extensive firewall support for isolation
- Secure DMA path and interconnect
- Secure watchdog/timer/IPC
Two Video Input Port (VIP) modules
- Support for up to eight multiplexed input ports
General-Purpose Memory Controller (GPMC)
Enhanced Direct Memory Access (EDMA) controller
2-port Gigabit Ethernet switch
Sixteen 32-bit general-purpose timers
32-bit MPU watchdog timer
Five Inter-Integrated Circuit (I²C™) ports
HDQ/1-Wire^® interface
Ten configurable UART/IrDA/CIR modules
Four Multichannel Serial Peripheral Interfaces (McSPI)
Quad Serial Peripheral Interface (QSPI)
SATA Gen2 interface
Eight Multichannel Audio Serial Port (McASP) modules
SuperSpeed USB 3.0 dual-role device
High Speed USB 2.0 dual-role device
Four Multimedia Card/Secure Digital/Secure Digital^® Input Output Interfaces (MMC™/SD^®/SDIO)
PCI-Express^® 3.0 (PCIe^®) subsystems with two 5-Gbps lanes
- One 2-lane Gen2-compliant port
- or two 1-lane Gen2-compliant ports
Up to two Controller Area Network (DCAN) modules
- CAN 2.0B protocol
Modular Controller Area Network (MCAN) module
- CAN 2.0B protocol with available FD
  (flexible data rate) functionality
Up to 247 General-Purpose I/O (GPIO) pins
Power, reset, and clock management
On-chip debug with CTools technology
28-nm CMOS technology
23 mm × 23 mm, 0.8-mm pitch, 760-pin BGA (ABZ)

All trademarks are the property of their respective owners.

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Part number	オーダー・オプション	Arm MHz (Max.)	DSP	Co-processor(s)	Display	Graphics acceleration	Camera	Ethernet MAC	Serial I/O	Industrial protocols	Security enabler	Operating temperature range (C)	Approx. price (US$)	DRAM	PCI/PCIe	Rating	Arm CPU	CSI-2
AM5748	ご注文	1500	2 C66x	Arm Cortex-M4 PRU-ICSS	3 LCD and 1 HDMI 1.4a	1 2D 2 3D	Parallel	10/100/1000 2-Port 1Gb Switch 4-Port 10/100 PRU EMAC 6-Port 10/100 PRU EMAC	CAN CAN-FD I2C McASP McSPI SPI UART USB	EtherCAT EtherNet/IP HSR POWERLINK PROFIBUS PROFINET RT/IRT PRP SERCOS III	Cryptographic acceleration Debug security Device identity External memory protection Initial secure programming Secure boot Secure storage Software IP protection Trusted execution environment	-40 to 105 0 to 90	40.96 \| 1ku	DDR3 DDR3L	2 PCIe Gen 2	Catalog	2 Arm Cortex-A15
AM5706	サンプルは利用できません。	500 1000	1 C66x	Arm Cortex-M4 PRU-ICSS			MIPI CSI-2 Parallel	10/100/1000 2-Port 1Gb Switch 4-Port 10/100 PRU EMAC	CAN I2C McASP McSPI SPI UART USB	EtherCAT EtherNet/IP HSR POWERLINK PROFIBUS PROFINET RT/IRT PRP SERCOS III	Cryptographic acceleration Debug security Device identity External memory protection Initial secure programming Secure boot Secure storage Software IP protection Trusted execution environment	-40 to 105 0 to 90	18.64 \| 1ku	DDR3 DDR3L	2 PCIe Gen 2	Catalog	1 Arm Cortex-A15	1
AM5708	サンプルは利用できません。	1000	1 C66x	Arm Cortex-M4 PRU-ICSS	2 LCD and 1 HDMI 1.4a	1 2D 1 3D	MIPI CSI-2 Parallel	10/100/1000 2-Port 1Gb Switch 4-Port 10/100 PRU EMAC	CAN I2C McASP McSPI SPI UART USB	EtherCAT EtherNet/IP HSR POWERLINK PROFIBUS PROFINET RT/IRT PRP SERCOS III	Cryptographic acceleration Debug security Device identity External memory protection Initial secure programming Secure boot Secure storage Software IP protection Trusted execution environment	-40 to 105 0 to 90	22.57 \| 1ku	DDR3 DDR3L	2 PCIe Gen 2	Catalog	1 Arm Cortex-A15	1
AM5716	サンプルは利用できません。	500 1500