ホーム ロジックと電圧変換 Configurable & programmable logic ICs Multivibrator one-shots
ホーム
ロジックと電圧変換
Configurable & programmable logic ICs
Multivibrator one-shots

CD4098B

アクティブ

CMOS デュアル・モノステーブル・マルチバイブレータ

ご注文はこちら
データシート

CD4098B

アクティブ
データシート ご注文はこちら

製品詳細

Number of channels 2 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Supply current (µA) 600 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode, Retriggerable, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
Number of channels 2 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Supply current (µA) 600 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode, Retriggerable, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Retriggerable/resettable capability
  • Trigger and reset propagation delays independent of RX, CX
  • Triggering from leading or trailing edge
  • Q and Q\ buffered outputs available
  • Separate resets
  • Wide range of output-pulse widths
  • 100% tested for maximum quiescent current at 20 V
  • Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices."
  • Applications:
    • Pulse delay and timing
    • Pulse shaping
    • Astable multivibrator
  • Retriggerable/resettable capability
  • Trigger and reset propagation delays independent of RX, CX
  • Triggering from leading or trailing edge
  • Q and Q\ buffered outputs available
  • Separate resets
  • Wide range of output-pulse widths
  • 100% tested for maximum quiescent current at 20 V
  • Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices."
  • Applications:
    • Pulse delay and timing
    • Pulse shaping
    • Astable multivibrator

CD4098B dual monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.

An external resistor (RX) and an external capacitor (CX) control the timing for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger progagation delay) and the time delay from set input to output transition (reset progagation delay) are independent of RX and CX.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) input are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused (-TR) input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD4098B is not used, its RESET should be tied to VSS. See Table 1.

In normal operation the circuit triggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q\ is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used.

The time period (T) for this multivibrator can be approximated by: TX= ½ RXCX for CX 0.01 uF. Time periods as a function of RX for values of CX and VDD are given in Fig. 8. Values of T vary from unit to unit and as a function of voltage, temperature, and RXCX.

The minimum value of external resistance, RX, is 5 k. The maximum value of external capacitance, CX, is 100uF. Fig.9 shows time periods as a function of CX for values of RX and VDD.

The output pulse width has variations of ±2.5% typically, over the temperature range of -55°C to 125°C for CX= 1000 pF and RX= 100 k.

For power supply variations of ±5%, the output pulse width has variations of ±0.5% typically, for VDD= 10 V and 15 V and ±1% typically, for VDD= 5 V at CX= 1000 pF and RX= 5 k.

These types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (M, M96, and MT suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

The CD4098B is similar to type MC14528.

CD4098B dual monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.

An external resistor (RX) and an external capacitor (CX) control the timing for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger progagation delay) and the time delay from set input to output transition (reset progagation delay) are independent of RX and CX.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) input are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused (-TR) input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD4098B is not used, its RESET should be tied to VSS. See Table 1.

In normal operation the circuit triggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q\ is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used.

The time period (T) for this multivibrator can be approximated by: TX= ½ RXCX for CX 0.01 uF. Time periods as a function of RX for values of CX and VDD are given in Fig. 8. Values of T vary from unit to unit and as a function of voltage, temperature, and RXCX.

The minimum value of external resistance, RX, is 5 k. The maximum value of external capacitance, CX, is 100uF. Fig.9 shows time periods as a function of CX for values of RX and VDD.

The output pulse width has variations of ±2.5% typically, over the temperature range of -55°C to 125°C for CX= 1000 pF and RX= 100 k.

For power supply variations of ±5%, the output pulse width has variations of ±0.5% typically, for VDD= 10 V and 15 V and ±1% typically, for VDD= 5 V at CX= 1000 pF and RX= 5 k.

These types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (M, M96, and MT suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

The CD4098B is similar to type MC14528.
open-in-new その他の Multivibrator one-shots を検索
ダウンロード 字幕付きのビデオを表示 ビデオ

技術資料

star =TI が選定したこの製品の主要ドキュメント
結果が見つかりませんでした。検索条件をクリアしてから、再度検索を試してください。
9 をすべて表示
種類 タイトル 最新の英語版をダウンロード 日付
* データシート CD4098B Types データシート (Rev. C) 2004年 10月 29日
アプリケーション・ノート Designing With the SN74LVC1G123 Monostable Multivibrator (Rev. A) PDF | HTML 2020年 3月 13日
セレクション・ガイド Logic Guide (Rev. AB) 2017年 6月 12日
アプリケーション・ノート Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
セレクション・ガイド ロジック・ガイド (Rev. AA 翻訳版) 最新英語版 (Rev.AB) 2014年 11月 6日
ユーザー・ガイド LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
アプリケーション・ノート Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
ユーザー・ガイド Signal Switch Data Book (Rev. A) 2003年 11月 14日
アプリケーション・ノート Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 2001年 12月 3日

設計と開発

その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。

評価ボード

14-24-LOGIC-EVM — 14 ピンから 24 ピンの D、DB、DGV、DW、DYY、NS、PW の各パッケージに封止した各種ロジック製品向けの汎用評価基板

14-24-logic-EVM 評価基板は、14 ピンから 24 ピンの D、DW、DB、NS、PW、DYY、DGV の各パッケージに封止した各種ロジック デバイスをサポートする設計を採用しています。

ユーザー ガイド: PDF | HTML
TI.com で取り扱いなし
パッケージ ピン数 ダウンロード
PDIP (N) 16 オプションの表示
SOIC (D) 16 オプションの表示
TSSOP (PW) 16 オプションの表示
TI の評価品に関する標準契約約款が適用されます。

購入と品質

記載されている情報：
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 材質成分
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
記載されている情報：
  • ファブの拠点
  • 組み立てを実施した拠点

サポートとトレーニング

TI E2E™ フォーラムでは、TI のエンジニアからの技術サポートを提供

投稿されたすべてのフォーラムトピック (英語) を表示

コンテンツは、TI 投稿者やコミュニティ投稿者によって「現状のまま」提供されるもので、TI による仕様の追加を意図するものではありません。使用条件をご確認ください。

TI 製品の品質、パッケージ、ご注文に関するお問い合わせは、TI サポートをご覧ください。​​​​​​​​​​​​​​

ビデオ