LMC660 CMOS Quad Operational Amplifier | TIJ.co.jp

LMC660
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CMOS Quad Operational Amplifier

 

推奨代替製品

  • LM6154  -  高帯域幅、高スルー・レート、RRIO、低ノイズ
  • LMC6484  -  アップグレード
  • LMP7704  -  高精度、RRIO、低バイアス電流、高 CMRR

概要

The LMC660 CMOS Quad operational amplifier is ideal for operation from a single supply. It operates from +5V to +15.5V and features rail-to-rail output swing in addition to an input common-mode range that includes ground. Performance limitations that have plagued CMOS amplifiers in the past are not a problem with this design. Input VOS, drift, and broadband noise as well as voltage gain into realistic loads (2 k and 600) are all equal to or better than widely accepted bipolar equivalents.

This chip is built with National's advanced Double-Poly Silicon-Gate CMOS process.

See the LMC662 datasheet for a dual CMOS operational amplifier with these same features.


特長

  • Rail-to-rail output swing
  • Specified for 2 k and 600 loads
  • High voltage gain: 126 dB
  • Low input offset voltage: 3 mV
  • Low offset voltage drift: 1.3 µV/°C
  • Ultra low input bias current: 2 fA
  • Input common-mode range includes V-
  • Operating range from +5V to +15.5V supply
  • ISS = 375 µA/amplifier; independent of V+
  • Low distortion: 0.01% at 10 kHz
  • Slew rate: 1.1 V/µs

機能一覧

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Part number オーダー・オプション Number of channels (#) Total supply voltage (Min) (+5V=5, +/-5V=10) Total supply voltage (Max) (+5V=5, +/-5V=10) GBW (Typ) (MHz) Slew rate (Typ) (V/us) Rail-to-rail Vos (offset voltage @ 25 C) (Max) (mV) Iq per channel (Typ) (mA) Vn at 1 kHz (Typ) (nV/rtHz) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Offset drift (Typ) (uV/C) Features Input bias current (Max) (pA) CMRR (Typ) (dB) Output current (Typ) (mA) Architecture
LMC660 ご注文 4     4.75     15.5     1.4     1.1     In to V-
Out    
3     0.38     22     Catalog     -40 to 85
0 to 70    
PDIP | 14
SOIC | 14    
14PDIP: 52 mm2: 8.26 x 6.35 (PDIP | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)    
1.3         0.2     83     21     CMOS