LMK61E2 プログラマブル、25ppm、156.25 LVPECL のスタート・アップ | TIJ.co.jp

LMK61E2 (供給中) プログラマブル、25ppm、156.25 LVPECL のスタート・アップ

プログラマブル、25ppm、156.25 LVPECL のスタート・アップ - LMK61E2
データシート
LMK61E2 Ultra-Low Jitter Programmable Oscillator With Internal EEPROM データシート   （英語）
 

概要

The LMK61E2 device is an ultra-low jitter PLLatinum programmable oscillator with a fractional-N frequency synthesizer with integrated VCO that generates commonly used reference clocks. The outputs can be configured as LVPECL, LVDS, or HCSL.

The device features self start-up from on-chip EEPROM that is factory programmed to generate 156.25-MHz LVPECL output. The device registers and EEPROM settings are fully programmable in-system through I2C serial interface. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3-V ± 5% supply.

The device provides fine and coarse frequency margining options through I2C serial interface to support system design verification tests (DVT), such as standard compliance and system timing margin testing.

特長

  • Ultra-Low Noise, High Performance
    • Jitter: 90 fs RMS Typical fOUT > 100 MHz
    • PSRR: –70 dBc, Robust Supply Noise Immunity
  • Flexible Output Format; User Selectable
    • LVPECL up to 1 GHz
    • LVDS up to 900 MHz
    • HCSL up to 400 MHz
  • Total Frequency Tolerance of ±50 ppm
  • System Level Features
    • Frequency Margining: Fine and Coarse
    • Internal EEPROM: User Configurable Default Settings
  • Other Features
    • Device Control: I2C
    • 3.3-V Operating Voltage
    • Industrial Temperature Range (–40ºC to +85ºC)
    • 7-mm × 5-mm 8-Pin Package
    • Create a Custom Design Using the LMK61E2 With the WEBENCH® Power Designer

Customize Your Oscillator

Device Variant (More device variants)
Device Attributes
Output format
Stability
±50 ppm
Device Output Frequency
Frequency Range for selected format
Supported Frequencies:
 
MHz
MHz

Custom Part number:

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機能一覧

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Part number オーダー・オプション Features Output frequency (Max) (MHz) Output level Jitter (ps) Stability (ppm) VCC core (V) Operating temperature range (C)
LMK61E2 ご注文 Programmable with EEPROM
7x5mm    		 1000     HCSL
LVDS
LVPECL    		 0.1     50     3.3     -40 to 85    
LMK60E0-156M ご注文 Standard
7x5mm    		 156.25     LVPECL     0.15     25     3.3     -40 to 85    
LMK60E2-150M ご注文 Standard
7x5mm    		 150     LVPECL     0.15     50     3.3     -40 to 85    
LMK60E2-156M ご注文 Standard
7x5mm    		 156.25     LVPECL     0.15     50     3.3     -40 to 85    
LMK61A2-100M ご注文 Standard
7x5mm    		 100     LVDS     0.1     50     3.3     -40 to 85    
LMK61A2-156M ご注文 Standard
7x5mm    		 156.25     LVDS     0.1     50     3.3     -40 to 85    
LMK61A2-644M ご注文 Standard
7x5mm    		 644.53125     LVDS     0.15     50     3.3     -40 to 85    
LMK61E0-155M ご注文 Standard
7x5mm    		 155.52     LVPECL     0.15     25     3.3     -40 to 85    
LMK61E0-156M ご注文 Standard
7x5mm    		 156.25     LVPECL     0.1     25     3.3     -40 to 85    
LMK61E07 ご注文 Programmable with EEPROM
7x5mm    		 1000     HCSL
LVDS
LVPECL    		 0.150     25     3.3     -40 to 85    
LMK61E0M ご注文 Standard
7x5mm    		 200     LVCMOS     0.5     25     3.3     -40 to 85    
LMK61E2-100M ご注文 Standard
7x5mm    		 100     LVPECL     0.1     50     3.3     -40 to 85    
LMK61E2-156M ご注文