SN74LVC1G0832 シングル 3 入力 正論理 AND-OR ゲート | TIJ.co.jp

SN74LVC1G0832
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シングル 3 入力 正論理 AND-OR ゲート

シングル 3 入力 正論理 AND-OR ゲート - SN74LVC1G0832
データシート
 

概要

This device is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G0832 device is a single 3-input positive AND-OR gate. It performs the Boolean function Y = (A • B ) + C in positive logic.

By tying one input to GND or VCC, the SN74LVC1G0832 device offers two more functions. When C is tied to GND, this device performs as a 2−input AND gate (Y = A • B). When A is tied to VCC, the device works as a 2−input OR gate (Y = B + C). This device also works as a 2−input OR gate when B is tied to VCC (Y = A + C).

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

特長

  • Available in the Texas Instruments NanoFree Package
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 5 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Input Hysteresis Allows Slow Input
    Transition and Better Switching Noise
    Immunity at the Input
    (Vhys = 250 mV Typ @ 3.3 V)
  • Can Be Used in Three Combinations:
    • AND-OR Gate
    • AND Gate
    • OR Gate
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
    •  

機能一覧

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Part number オーダー・オプション Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Inputs per channel IOL (Max) (mA) IOH (Max) (mA) Input type Output type Features Data rate (Max) (Mbps) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG)
SN74LVC1G0832 ご注文 LVC     1.65     5.5     1     3     32     -32     Standard CMOS     Push-Pull     Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
100     Catalog     -40 to 125
-40 to 85    
DSBGA | 6
SC70 | 6
SOT-23 | 6    
6DSBGA: 1 mm2: .9 x 1.5 (DSBGA | 6)
6SC70: 4 mm2: 2.1 x 2 (SC70 | 6)
6SOT-23: 5 mm2: 1.6 x 2.9 (SOT-23 | 6)