ADC10D1500RB

The ADC10D1500 is the latest advance in Nationals Ultra-High-Speed ADC family. This low-power, high-performance CMOS analog-to-digital converter digitizes signals at 10-bit resolution for dual channels at sampling rates of up to 1.5 GSPS (Non-DES Mode) or for a single channel up to 3.0 GSPS (DES Mode). The ADC10D1500 achieves excellent accuracy and dynamic performance while dissipating less than 3.6 Watts.

The ADC10D1500 Reference Board (ADC10D1500RB) is designed to assist in the evaluation of the ADC in a system, as well as serve as a reference design for the customers system. All that are required, in addition to the Reference Board kit, in order to use it are a PC and a signal generator for the analog input. A bandpass or lowpass filter for the analog input is also strongly recommended. This platform can be evaluated and controlled via WaveVision5 software, which has been developed for use with it. The on-board FPGA captures data from the ADC and transfers it to the PC via the USB connection. Data may be viewed in the time domain, frequency domain, or as a histogram. The ADC10D1500 control registers, which offer additional mode selection and features, may also be accessed via the WaveVision5 interface.

The features of this board are designed to allow for maximum flexibility and convenience. The analog input may be configured for AC- or DC-coupling and two balun boards of different frequency ranges are provided to achieve single-ended to differential conversion from a signal source. Nationals on-board LMX2531LQ1500E provides a sampling clock at 1.5GHz. Alternately, an external clock at a different frequency may be used for the sampling clock. A 7.5V brick supply provides power to the board and the power supply section, which regulates this supply down to the various required voltages, serves as a model for a customer system. See the Users Guide for a complete description of features.

• Excellent accuracy and dynamic performance
• Low power consumption, further reduced at lower Fs
• Internally terminated, buffered, differential analog inputs
• R/W SPI interface for Extended Control Mode
• Dual-Edge Sampling Mode, in which the I- and Q-channels sample one input at twice the sampling clock rate
• Test patterns at output for system debug
• Programmable 15-bit gain and 12-bit plus sign offset
• Programmable t_AD adjust feature
• 1:1 non-demuxed or 1:2 demuxed LVDS outputs
• AutoSync feature for multi-chip systems
• Single 1.9V 0.1V power supply
• 292-ball BGA package (27mm x 27mm x 2.4mm with 1.27mm ball-patch); no heat sink required
• LC sampling clock filter for jitter reduction