SN65LVDS31 クワッド LVDS トランスミッタ | TIJ.co.jp

SN65LVDS31 (供給中) クワッド LVDS トランスミッタ

 

推奨代替製品

  • SN65LVDS32  -  コンパニオン・クワッド LVDS レシーバ
  • SN65LVDS32B  -  コンパニオン・クワッド LVDS レシーバ
  • SN65LVDS33  -  コンパニオン・クワッド LVDS レシーバ
  • SN65LVDS31-EP  -  エンハンスド製品
  • SN65LVDS048A  - このデバイスは類似の機能を備えていますが、同等の機能ではありません。 
  • SN65LVDS390  - このデバイスは類似の機能を備えていますが、同等の機能ではありません。 
  • SN65LVDS348  - このデバイスは類似の機能を備えていますが、同等の機能ではありません。 
  • SN65LVDS352  - このデバイスは類似の機能を備えていますが、同等の機能ではありません。 

概要

The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-Ω load when enabled.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 devices are characterized for operation from –40°C to 85°C. The SN55LVDS31 device is characterized for operation from –55°C to 125°C.

特長

  • Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
  • Low-Voltage Differential Signaling With Typical Output Voltage
    of 350 mV and 100-Ω Load
  • Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)
  • Typical Propagation Delay Times of 1.7 ns
  • Operate From a Single 3.3-V Supply
  • Power Dissipation 25 mW Typical Per Driver at 200 MHz
  • Driver at High-Impedance When Disabled or With VCC = 0
  • Bus-Terminal ESD Protection Exceeds 8 kV
  • Low-Voltage TTL (LVTTL) Logic Input Levels
  • Pin Compatible With AM26LS31, MC3487, and µA9638
  • Cold Sparing for Space and High-Reliability Applications Requiring
    Redundancy

WEBENCH® Designer SN65LVDS31

Tx:
Mid Channel:
Rx:
Max Data Rate:  Gbps

 
Number of UI:
PRBS:
 
Eye Diagram

機能一覧

他の製品と比較 LVDS, M-LVDS & PECL メール Excelへダウンロード
Part number オーダー・オプション Function Protocols Number of Tx Number of Rx Signaling rate (Mbps) Input signal Output signal Package Group Operating temperature range (C) Rating
SN65LVDS31 ご注文 Driver     LVDS     4     0     400     TTL
CMOS
LVTTL    
LVDS     SOIC | 16
SO | 16
TSSOP | 16    
-40 to 85     Catalog    
SN65LVDM31 サンプルは利用できません。 Driver     M-LVDS     4     0     150     LVCMOS     LVDM     SOIC | 16     -40 to 85     Catalog    
SN65LVDS32 ご注文 Receiver     LVDS     0     4     100     LVDS     LVTTL     SOIC | 16
SO | 16
TSSOP | 16    
-40 to 85     Catalog    
SN65LVDS32B ご注文 Receiver     LVDS     0     4     400     LVDS     LVTTL     SOIC | 16     -40 to 85     Catalog    
SN65LVDS33 ご注文 Receiver     LVDS     0     4     500     ECL
LVPECL
PECL    
LVTTL     SOIC | 16
TSSOP | 16    
-40 to 85     Catalog    
SN65LVDS348 ご注文 Receiver     LVDS     0     4     560     CMOS
ECL
LVCMOS
LVDS
LVECL
LVPECL
PECL    
LVTTL     SOIC | 16
TSSOP | 16    
-40 to 85     Catalog    
SN65LVDS352 サンプルは利用できません。 Receiver     LVDS     0     4     560     CMOS
ECL
LVCMOS
LVDS
LVECL
LVPECL
PECL    
LVTTL     TSSOP | 24     -40 to 85     Catalog    
SN65LVDT32B サンプルは利用できません。 Receiver     LVDS     0     4     400     LVDS     LVTTL     SOIC | 16     -40 to 85     Catalog    
SN65LVDT33 サンプルは利用できません。 Receiver     LVDS     0     4     400