ホーム パワー・マネージメント AC/DC & DC/DC controllers (external FET)

TPPM0115

アクティブ

12V、スイッチ・モード同期整流降圧コントローラ

製品詳細

Vin (min) (V) 11.4 Vin (max) (V) 12.6 Operating temperature range (°C) 0 to 70 Control mode Voltage mode Rating Catalog Vout (min) (V) 1 Vout (max) (V) 2.55 Duty cycle (max) (%) 100
Vin (min) (V) 11.4 Vin (max) (V) 12.6 Operating temperature range (°C) 0 to 70 Control mode Voltage mode Rating Catalog Vout (min) (V) 1 Vout (max) (V) 2.55 Duty cycle (max) (%) 100
SOIC (D) 8 29.4 mm² 4.9 x 6
  • DC-DC Synchronous Buck Controller
  • Switching Frequency, 200 kHz (Typ)
  • Programmable Output Voltage, 1 V to 2.5 V ±2%
  • Power Good Function (PWRGD)
  • Input Voltage, 12 V ±5%
  • Drive High Load Current With External Components
  • applications
    • PC Motherboard, Voltage Regulation for System Power
    • DDR Memory Supply (VDDQ or VTT)
    • RDRAM Memory Supply (VDDQ)
    • General Purpose Synchronous Switch Mode Controller

  • DC-DC Synchronous Buck Controller
  • Switching Frequency, 200 kHz (Typ)
  • Programmable Output Voltage, 1 V to 2.5 V ±2%
  • Power Good Function (PWRGD)
  • Input Voltage, 12 V ±5%
  • Drive High Load Current With External Components
  • applications
    • PC Motherboard, Voltage Regulation for System Power
    • DDR Memory Supply (VDDQ or VTT)
    • RDRAM Memory Supply (VDDQ)
    • General Purpose Synchronous Switch Mode Controller

The TPPM0115 is a synchronous buck controller capable of driving two external power FETs 180° out of phase. The device requires a minimum of external standard filter components and switching FETs to regulate the desired output voltage. This is achieved with an internal switching frequency of 200 kHz (typical).

The TPPM0115 switch mode controller and associated circuitry provide efficient voltage regulation of greater than 85%. The output voltage is set by two external resistors. During power up, when the output voltage reaches 90% of the desired value, the power good (PWRGD) output is transitioned high after a short delay of 1 ms to 5 ms. During power down, when the output voltage falls below 90% of the set value, the PWRGD output is pulled low without any delay.

In the event the set output is in an over-voltage condition due to a system fault, the drive to the lower FET turns on to correct the fault. There is a dead time between switching one FET ON while the other FET is switching OFF to prevent cross conduction.

The TPPM0115 is capable of driving high static load currents with minimal ripple on the output (<2%). The phase sense input is used to sense the flow of current through the inductor during flyback to minimize ripple on the output.

To optimize output filter capacitance, the voltage mode control is based on a fixed ON time during the start of the cycle and hysteretic control during load transients. This allows the device to respond and maintain the set regulation voltage.

The TPPM0115 is a synchronous buck controller capable of driving two external power FETs 180° out of phase. The device requires a minimum of external standard filter components and switching FETs to regulate the desired output voltage. This is achieved with an internal switching frequency of 200 kHz (typical).

The TPPM0115 switch mode controller and associated circuitry provide efficient voltage regulation of greater than 85%. The output voltage is set by two external resistors. During power up, when the output voltage reaches 90% of the desired value, the power good (PWRGD) output is transitioned high after a short delay of 1 ms to 5 ms. During power down, when the output voltage falls below 90% of the set value, the PWRGD output is pulled low without any delay.

In the event the set output is in an over-voltage condition due to a system fault, the drive to the lower FET turns on to correct the fault. There is a dead time between switching one FET ON while the other FET is switching OFF to prevent cross conduction.

The TPPM0115 is capable of driving high static load currents with minimal ripple on the output (<2%). The phase sense input is used to sense the flow of current through the inductor during flyback to minimize ripple on the output.

To optimize output filter capacitance, the voltage mode control is based on a fixed ON time during the start of the cycle and hysteretic control during load transients. This allows the device to respond and maintain the set regulation voltage.

ダウンロード 字幕付きのビデオを表示 ビデオ

技術資料

star =TI が選定したこの製品の主要ドキュメント
結果が見つかりませんでした。検索条件をクリアしてから、再度検索を試してください。
1 をすべて表示
種類 タイトル 最新の英語版をダウンロード 日付
* データシート Switch Mode Synchronous Buck Controller データシート (Rev. A) 2001年 5月 18日

設計と開発

その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。

パッケージ ピン数 ダウンロード
SOIC (D) 8 オプションの表示

購入と品質

記載されている情報:
  • RoHS
  • REACH
  • デバイスのマーキング
  • リード端子の仕上げ / ボールの原材料
  • MSL 定格 / ピーク リフロー
  • MTBF/FIT 推定値
  • 材質成分
  • 認定試験結果
  • 継続的な信頼性モニタ試験結果
記載されている情報:
  • ファブの拠点
  • 組み立てを実施した拠点

サポートとトレーニング

TI E2E™ フォーラムでは、TI のエンジニアからの技術サポートを提供

コンテンツは、TI 投稿者やコミュニティ投稿者によって「現状のまま」提供されるもので、TI による仕様の追加を意図するものではありません。使用条件をご確認ください。

TI 製品の品質、パッケージ、ご注文に関するお問い合わせは、TI サポートをご覧ください。​​​​​​​​​​​​​​

ビデオ